Message ID | 1444845523-19243-1-git-send-email-stefan@agner.ch |
---|---|
State | Awaiting Upstream |
Delegated to: | Stefano Babic |
Headers | show |
On Wed, Oct 14, 2015 at 2:58 PM, Stefan Agner <stefan@agner.ch> wrote: > Currently, the device tree relocation is disabled, likely to > keep some DDR3 RAM at the end for Cortex-M4 firmwares. This > can be archived using bootm_size, which limits the image > processing range of the boot commands. > > Move the device tree standard load address to a higher address > which aligns better with what we are doing on other boards. > > Signed-off-by: Stefan Agner <stefan@agner.ch> Great! Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Hi Stefan, On 14/10/2015 19:58, Stefan Agner wrote: > Currently, the device tree relocation is disabled, likely to > keep some DDR3 RAM at the end for Cortex-M4 firmwares. This > can be archived using bootm_size, which limits the image > processing range of the boot commands. > > Move the device tree standard load address to a higher address > which aligns better with what we are doing on other boards. > > Signed-off-by: Stefan Agner <stefan@agner.ch> > --- > So this is the second version of the patch "arm: vf610: move > device tree after kernel image" which makes use of bootm_size. > I also added an appropriate comment, added variables for > RAM disk, and added kernel_addr_r/fdt_addr_r. > > -- > Stefan > > include/configs/vf610twr.h | 27 +++++++++++++++++++++------ > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h > index 324ba8f..7f4260a 100644 > --- a/include/configs/vf610twr.h > +++ b/include/configs/vf610twr.h > @@ -116,20 +116,37 @@ > > #define CONFIG_BOOTDELAY 3 > > -#define CONFIG_LOADADDR 0x82000000 > +#define CONFIG_SYS_LOAD_ADDR 0x82000000 > > /* We boot from the gfxRAM area of the OCRAM. */ > #define CONFIG_SYS_TEXT_BASE 0x3f408000 > #define CONFIG_BOARD_SIZE_LIMIT 524288 > > +/* > + * We do have 128MB of memory on the Vybrid Tower board. Leave the last > + * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from > + * DDR3. Hence, limit the memory range for image processing to 112MB > + * using bootm_size. All of the following must be within this range. > + * We have the default load at 32MB into DDR (for the kernel), FDT at > + * 64MB and the ramdisk 512KB above that (allowing for hopefully never > + * seen large trees). This allows a reasonable split between ramdisk > + * and kernel size, where the ram disk can be a bit larger. > + */ > +#define MEM_LAYOUT_ENV_SETTINGS \ > + "bootm_size=0x07000000\0" \ > + "loadaddr=0x82000000\0" \ > + "kernel_addr_r=0x82000000\0" \ > + "fdt_addr=0x84000000\0" \ > + "fdt_addr_r=0x84000000\0" \ > + "rdaddr=0x84080000\0" \ > + "ramdisk_addr_r=0x84080000\0" > + > #define CONFIG_EXTRA_ENV_SETTINGS \ > + MEM_LAYOUT_ENV_SETTINGS \ > "script=boot.scr\0" \ > "image=zImage\0" \ > "console=ttyLP1\0" \ > - "fdt_high=0xffffffff\0" \ > - "initrd_high=0xffffffff\0" \ > "fdt_file=vf610-twr.dtb\0" \ > - "fdt_addr=0x81000000\0" \ > "boot_fdt=try\0" \ > "ip_dyn=yes\0" \ > "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ > @@ -224,8 +241,6 @@ > #define CONFIG_SYS_MEMTEST_START 0x80010000 > #define CONFIG_SYS_MEMTEST_END 0x87C00000 > > -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR > - > /* > * Stack sizes > * The stack sizes are set up in start.S using the settings below > I can still push it into release. Applied (fix) to u-boot-imx, thanks ! Best regards, Stefano Babic
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 324ba8f..7f4260a 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -116,20 +116,37 @@ #define CONFIG_BOOTDELAY 3 -#define CONFIG_LOADADDR 0x82000000 +#define CONFIG_SYS_LOAD_ADDR 0x82000000 /* We boot from the gfxRAM area of the OCRAM. */ #define CONFIG_SYS_TEXT_BASE 0x3f408000 #define CONFIG_BOARD_SIZE_LIMIT 524288 +/* + * We do have 128MB of memory on the Vybrid Tower board. Leave the last + * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from + * DDR3. Hence, limit the memory range for image processing to 112MB + * using bootm_size. All of the following must be within this range. + * We have the default load at 32MB into DDR (for the kernel), FDT at + * 64MB and the ramdisk 512KB above that (allowing for hopefully never + * seen large trees). This allows a reasonable split between ramdisk + * and kernel size, where the ram disk can be a bit larger. + */ +#define MEM_LAYOUT_ENV_SETTINGS \ + "bootm_size=0x07000000\0" \ + "loadaddr=0x82000000\0" \ + "kernel_addr_r=0x82000000\0" \ + "fdt_addr=0x84000000\0" \ + "fdt_addr_r=0x84000000\0" \ + "rdaddr=0x84080000\0" \ + "ramdisk_addr_r=0x84080000\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttyLP1\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ "fdt_file=vf610-twr.dtb\0" \ - "fdt_addr=0x81000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ @@ -224,8 +241,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80010000 #define CONFIG_SYS_MEMTEST_END 0x87C00000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - /* * Stack sizes * The stack sizes are set up in start.S using the settings below
Currently, the device tree relocation is disabled, likely to keep some DDR3 RAM at the end for Cortex-M4 firmwares. This can be archived using bootm_size, which limits the image processing range of the boot commands. Move the device tree standard load address to a higher address which aligns better with what we are doing on other boards. Signed-off-by: Stefan Agner <stefan@agner.ch> --- So this is the second version of the patch "arm: vf610: move device tree after kernel image" which makes use of bootm_size. I also added an appropriate comment, added variables for RAM disk, and added kernel_addr_r/fdt_addr_r. -- Stefan include/configs/vf610twr.h | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-)