| Message ID | 1441185060-18197-3-git-send-email-sr@denx.de |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On Wed, Sep 02, 2015 at 11:10:59AM +0200, Stefan Roese wrote: > This board is equipped with a Micron NAND chip (MT29F1G08ABADAH4) that > needs 4-bit ECC. But the SPEAr600 only supports 1-bit HW ECC internally. > This patch enables the SW 4-bit BCH support for this board. > > Signed-off-by: Stefan Roese <sr@denx.de> > Cc: Viresh Kumar <viresh.kumar@linaro.org> Applied to u-boot/master, thanks!
diff --git a/include/configs/x600.h b/include/configs/x600.h index 6a57388..f672485 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -67,6 +67,8 @@ #define CONFIG_MTD_ECC_SOFT #define CONFIG_SYS_FSMC_NAND_8BIT #define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_ECC_BCH +#define CONFIG_BCH /* UBI/UBI config options */ #define CONFIG_MTD_DEVICE
This board is equipped with a Micron NAND chip (MT29F1G08ABADAH4) that needs 4-bit ECC. But the SPEAr600 only supports 1-bit HW ECC internally. This patch enables the SW 4-bit BCH support for this board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> --- include/configs/x600.h | 2 ++ 1 file changed, 2 insertions(+)