diff mbox

[U-Boot,1/6] armv8: Make COUNTER_FREQUENCY optional

Message ID 1440063743-22838-1-git-send-email-thierry.reding@gmail.com
State Accepted
Delegated to: Tom Warren
Headers show

Commit Message

Thierry Reding Aug. 20, 2015, 9:42 a.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Some platforms have the means to determine the counter frequency at
runtime, so give them an opportunity to do so.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm/cpu/armv8/start.S | 2 ++
 1 file changed, 2 insertions(+)

Comments

Stephen Warren Aug. 20, 2015, 3:32 p.m. UTC | #1 
On 08/20/2015 03:42 AM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Some platforms have the means to determine the counter frequency at
> runtime, so give them an opportunity to do so.

Aside from the one comment I already made, the series,

Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>

I validated that the calculated clk_m rate is correct on p2371-2180 when 
booted under L4T's nvtboot. I didn't validate the programming of 
cntfrq_el0, since I'm booting at EL2 not EL3. Still, that part is 
trivial and the same code as in start.S.

Tom, this series would replace my patch "ARM: tegra: fix 
COUNTER_FREQUENCY for T210". Or perhaps apply my patch then fix up the 
minor conflicts when applying this series. That would at least document 
the fact that COUNTER_FREQUENCY was wrong in all the initial header 
files, in case someone looks back at old git versions.
diff mbox

Patch

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index e70bed462a59..da45d984d01a 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -54,8 +54,10 @@  reset:
 	orr	x0, x0, #0xf			/* SCR_EL3.NS|IRQ|FIQ|EA */
 	msr	scr_el3, x0
 	msr	cptr_el3, xzr			/* Enable FP/SIMD */
+#ifdef COUNTER_FREQUENCY
 	ldr	x0, =COUNTER_FREQUENCY
 	msr	cntfrq_el0, x0			/* Initialize CNTFRQ */
+#endif
 	b	0f
 2:	msr	vbar_el2, x0
 	mov	x0, #0x33ff