| Message ID | 1439807574-26767-8-git-send-email-jteki@openedev.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: > This patch adds flag status register reading support to > spi_flash_cmd_wait_ready. > > Signed-off-by: Jagan Teki <jteki@openedev.com> > Cc: Simon Glass <sjg@chromium.org> > Cc: Marek Vasut <marex@denx.de> > Cc: Michal Simek <michal.simek@xilinx.com> > Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > Cc: Stefan Roese <sr@denx.de> > Cc: Tom Warren <twarren@nvidia.com> > Cc: Bin Meng <bmeng.cn@gmail.com> > Cc: Tom Rini <trini@konsulko.com> > Cc: Hou Zhiqiang <B48286@freescale.com> > Tested-by: Jagan Teki <jteki@openedev.com> > --- > drivers/mtd/spi/sf_internal.h | 1 + > drivers/mtd/spi/sf_ops.c | 66 > +++++++++++++++++++++++++++++++++++++++---- drivers/mtd/spi/sf_probe.c > | 4 +-- > include/spi_flash.h | 2 -- > 4 files changed, 62 insertions(+), 11 deletions(-) > > diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h > index e97c716..4ecfd0c 100644 > --- a/drivers/mtd/spi/sf_internal.h > +++ b/drivers/mtd/spi/sf_internal.h > @@ -49,6 +49,7 @@ enum { > > enum spi_nor_option_flags { > SNOR_F_SST_WR = (1 << 0), > + SNOR_F_USE_FSR = (1 << 1), > }; > > #define SPI_FLASH_3B_ADDR_LEN 3 > diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c > index 7d7c264..a5487ad 100644 > --- a/drivers/mtd/spi/sf_ops.c > +++ b/drivers/mtd/spi/sf_ops.c > @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, > u8 *rs) return 0; > } > > +static int read_fsr(struct spi_flash *flash, u8 *fsr) > +{ > + int ret; > + u8 cmd; > + > + cmd = CMD_FLAG_STATUS; > + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); > + if (ret < 0) { > + debug("SF: fail to read flag status register\n"); > + return ret; > + } > + > + return 0; > +} > + > int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) > { > u8 cmd; > @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct spi_flash > *flash, u32 *addr) } > #endif > > +static inline int spi_flash_sr_ready(struct spi_flash *flash) > +{ > + u8 sr; > + int ret; > + > + ret = spi_flash_cmd_read_status(flash, &sr); > + if (ret < 0) > + return ret; > + > + if (sr < 0) Have you ever seen u8 value that's < 0 ? :-) > + return sr; > + else > + return !(sr & STATUS_WIP); > +} [...]
On 19 August 2015 at 03:33, Marek Vasut <marex@denx.de> wrote: > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: >> This patch adds flag status register reading support to >> spi_flash_cmd_wait_ready. >> >> Signed-off-by: Jagan Teki <jteki@openedev.com> >> Cc: Simon Glass <sjg@chromium.org> >> Cc: Marek Vasut <marex@denx.de> >> Cc: Michal Simek <michal.simek@xilinx.com> >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> >> Cc: Stefan Roese <sr@denx.de> >> Cc: Tom Warren <twarren@nvidia.com> >> Cc: Bin Meng <bmeng.cn@gmail.com> >> Cc: Tom Rini <trini@konsulko.com> >> Cc: Hou Zhiqiang <B48286@freescale.com> >> Tested-by: Jagan Teki <jteki@openedev.com> >> --- >> drivers/mtd/spi/sf_internal.h | 1 + >> drivers/mtd/spi/sf_ops.c | 66 >> +++++++++++++++++++++++++++++++++++++++---- drivers/mtd/spi/sf_probe.c >> | 4 +-- >> include/spi_flash.h | 2 -- >> 4 files changed, 62 insertions(+), 11 deletions(-) >> >> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h >> index e97c716..4ecfd0c 100644 >> --- a/drivers/mtd/spi/sf_internal.h >> +++ b/drivers/mtd/spi/sf_internal.h >> @@ -49,6 +49,7 @@ enum { >> >> enum spi_nor_option_flags { >> SNOR_F_SST_WR = (1 << 0), >> + SNOR_F_USE_FSR = (1 << 1), >> }; >> >> #define SPI_FLASH_3B_ADDR_LEN 3 >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c >> index 7d7c264..a5487ad 100644 >> --- a/drivers/mtd/spi/sf_ops.c >> +++ b/drivers/mtd/spi/sf_ops.c >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, >> u8 *rs) return 0; >> } >> >> +static int read_fsr(struct spi_flash *flash, u8 *fsr) >> +{ >> + int ret; >> + u8 cmd; >> + >> + cmd = CMD_FLAG_STATUS; >> + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); >> + if (ret < 0) { >> + debug("SF: fail to read flag status register\n"); >> + return ret; >> + } >> + >> + return 0; >> +} >> + >> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) >> { >> u8 cmd; >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct spi_flash >> *flash, u32 *addr) } >> #endif >> >> +static inline int spi_flash_sr_ready(struct spi_flash *flash) >> +{ >> + u8 sr; >> + int ret; >> + >> + ret = spi_flash_cmd_read_status(flash, &sr); >> + if (ret < 0) >> + return ret; >> + >> + if (sr < 0) > > Have you ever seen u8 value that's < 0 ? :-) Yes, over looked, It's been fixed on next patches as well. > >> + return sr; >> + else >> + return !(sr & STATUS_WIP); >> +} thanks!
On Wednesday, August 19, 2015 at 12:36:40 AM, Jagan Teki wrote: > On 19 August 2015 at 03:33, Marek Vasut <marex@denx.de> wrote: > > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: > >> This patch adds flag status register reading support to > >> spi_flash_cmd_wait_ready. > >> > >> Signed-off-by: Jagan Teki <jteki@openedev.com> > >> Cc: Simon Glass <sjg@chromium.org> > >> Cc: Marek Vasut <marex@denx.de> > >> Cc: Michal Simek <michal.simek@xilinx.com> > >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > >> Cc: Stefan Roese <sr@denx.de> > >> Cc: Tom Warren <twarren@nvidia.com> > >> Cc: Bin Meng <bmeng.cn@gmail.com> > >> Cc: Tom Rini <trini@konsulko.com> > >> Cc: Hou Zhiqiang <B48286@freescale.com> > >> Tested-by: Jagan Teki <jteki@openedev.com> > >> --- > >> > >> drivers/mtd/spi/sf_internal.h | 1 + > >> drivers/mtd/spi/sf_ops.c | 66 > >> > >> +++++++++++++++++++++++++++++++++++++++---- drivers/mtd/spi/sf_probe.c > >> > >> | 4 +-- > >> > >> include/spi_flash.h | 2 -- > >> 4 files changed, 62 insertions(+), 11 deletions(-) > >> > >> diff --git a/drivers/mtd/spi/sf_internal.h > >> b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644 > >> --- a/drivers/mtd/spi/sf_internal.h > >> +++ b/drivers/mtd/spi/sf_internal.h > >> @@ -49,6 +49,7 @@ enum { > >> > >> enum spi_nor_option_flags { > >> > >> SNOR_F_SST_WR = (1 << 0), > >> > >> + SNOR_F_USE_FSR = (1 << 1), > >> > >> }; > >> > >> #define SPI_FLASH_3B_ADDR_LEN 3 > >> > >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c > >> index 7d7c264..a5487ad 100644 > >> --- a/drivers/mtd/spi/sf_ops.c > >> +++ b/drivers/mtd/spi/sf_ops.c > >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash > >> *flash, u8 *rs) return 0; > >> > >> } > >> > >> +static int read_fsr(struct spi_flash *flash, u8 *fsr) > >> +{ > >> + int ret; > >> + u8 cmd; > >> + > >> + cmd = CMD_FLAG_STATUS; > >> + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); > >> + if (ret < 0) { > >> + debug("SF: fail to read flag status register\n"); > >> + return ret; > >> + } > >> + > >> + return 0; > >> +} > >> + > >> > >> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) > >> { > >> > >> u8 cmd; > >> > >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct spi_flash > >> *flash, u32 *addr) } > >> > >> #endif > >> > >> +static inline int spi_flash_sr_ready(struct spi_flash *flash) > >> +{ > >> + u8 sr; > >> + int ret; > >> + > >> + ret = spi_flash_cmd_read_status(flash, &sr); > >> + if (ret < 0) > >> + return ret; > >> + > >> + if (sr < 0) > > > > Have you ever seen u8 value that's < 0 ? :-) > > Yes, over looked, It's been fixed on next patches as well. Please don't apply broken code, fix this and repost. Best regards, Marek Vasut
On 19 August 2015 at 04:28, Marek Vasut <marex@denx.de> wrote: > On Wednesday, August 19, 2015 at 12:36:40 AM, Jagan Teki wrote: >> On 19 August 2015 at 03:33, Marek Vasut <marex@denx.de> wrote: >> > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: >> >> This patch adds flag status register reading support to >> >> spi_flash_cmd_wait_ready. >> >> >> >> Signed-off-by: Jagan Teki <jteki@openedev.com> >> >> Cc: Simon Glass <sjg@chromium.org> >> >> Cc: Marek Vasut <marex@denx.de> >> >> Cc: Michal Simek <michal.simek@xilinx.com> >> >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> >> >> Cc: Stefan Roese <sr@denx.de> >> >> Cc: Tom Warren <twarren@nvidia.com> >> >> Cc: Bin Meng <bmeng.cn@gmail.com> >> >> Cc: Tom Rini <trini@konsulko.com> >> >> Cc: Hou Zhiqiang <B48286@freescale.com> >> >> Tested-by: Jagan Teki <jteki@openedev.com> >> >> --- >> >> >> >> drivers/mtd/spi/sf_internal.h | 1 + >> >> drivers/mtd/spi/sf_ops.c | 66 >> >> >> >> +++++++++++++++++++++++++++++++++++++++---- drivers/mtd/spi/sf_probe.c >> >> >> >> | 4 +-- >> >> >> >> include/spi_flash.h | 2 -- >> >> 4 files changed, 62 insertions(+), 11 deletions(-) >> >> >> >> diff --git a/drivers/mtd/spi/sf_internal.h >> >> b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644 >> >> --- a/drivers/mtd/spi/sf_internal.h >> >> +++ b/drivers/mtd/spi/sf_internal.h >> >> @@ -49,6 +49,7 @@ enum { >> >> >> >> enum spi_nor_option_flags { >> >> >> >> SNOR_F_SST_WR = (1 << 0), >> >> >> >> + SNOR_F_USE_FSR = (1 << 1), >> >> >> >> }; >> >> >> >> #define SPI_FLASH_3B_ADDR_LEN 3 >> >> >> >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c >> >> index 7d7c264..a5487ad 100644 >> >> --- a/drivers/mtd/spi/sf_ops.c >> >> +++ b/drivers/mtd/spi/sf_ops.c >> >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash >> >> *flash, u8 *rs) return 0; >> >> >> >> } >> >> >> >> +static int read_fsr(struct spi_flash *flash, u8 *fsr) >> >> +{ >> >> + int ret; >> >> + u8 cmd; >> >> + >> >> + cmd = CMD_FLAG_STATUS; >> >> + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); >> >> + if (ret < 0) { >> >> + debug("SF: fail to read flag status register\n"); >> >> + return ret; >> >> + } >> >> + >> >> + return 0; >> >> +} >> >> + >> >> >> >> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) >> >> { >> >> >> >> u8 cmd; >> >> >> >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct spi_flash >> >> *flash, u32 *addr) } >> >> >> >> #endif >> >> >> >> +static inline int spi_flash_sr_ready(struct spi_flash *flash) >> >> +{ >> >> + u8 sr; >> >> + int ret; >> >> + >> >> + ret = spi_flash_cmd_read_status(flash, &sr); >> >> + if (ret < 0) >> >> + return ret; >> >> + >> >> + if (sr < 0) >> > >> > Have you ever seen u8 value that's < 0 ? :-) >> >> Yes, over looked, It's been fixed on next patches as well. > > Please don't apply broken code, fix this and repost. I don't know what your talking about, there is patch already submitted with this fix and even you're CCed [1] [1] https://patchwork.ozlabs.org/patch/508166/ thanks!
On Wednesday, August 19, 2015 at 09:35:32 AM, Jagan Teki wrote: > On 19 August 2015 at 04:28, Marek Vasut <marex@denx.de> wrote: > > On Wednesday, August 19, 2015 at 12:36:40 AM, Jagan Teki wrote: > >> On 19 August 2015 at 03:33, Marek Vasut <marex@denx.de> wrote: > >> > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: > >> >> This patch adds flag status register reading support to > >> >> spi_flash_cmd_wait_ready. > >> >> > >> >> Signed-off-by: Jagan Teki <jteki@openedev.com> > >> >> Cc: Simon Glass <sjg@chromium.org> > >> >> Cc: Marek Vasut <marex@denx.de> > >> >> Cc: Michal Simek <michal.simek@xilinx.com> > >> >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > >> >> Cc: Stefan Roese <sr@denx.de> > >> >> Cc: Tom Warren <twarren@nvidia.com> > >> >> Cc: Bin Meng <bmeng.cn@gmail.com> > >> >> Cc: Tom Rini <trini@konsulko.com> > >> >> Cc: Hou Zhiqiang <B48286@freescale.com> > >> >> Tested-by: Jagan Teki <jteki@openedev.com> > >> >> --- > >> >> > >> >> drivers/mtd/spi/sf_internal.h | 1 + > >> >> drivers/mtd/spi/sf_ops.c | 66 > >> >> > >> >> +++++++++++++++++++++++++++++++++++++++---- > >> >> drivers/mtd/spi/sf_probe.c > >> >> > >> >> | 4 +-- > >> >> > >> >> include/spi_flash.h | 2 -- > >> >> 4 files changed, 62 insertions(+), 11 deletions(-) > >> >> > >> >> diff --git a/drivers/mtd/spi/sf_internal.h > >> >> b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644 > >> >> --- a/drivers/mtd/spi/sf_internal.h > >> >> +++ b/drivers/mtd/spi/sf_internal.h > >> >> @@ -49,6 +49,7 @@ enum { > >> >> > >> >> enum spi_nor_option_flags { > >> >> > >> >> SNOR_F_SST_WR = (1 << 0), > >> >> > >> >> + SNOR_F_USE_FSR = (1 << 1), > >> >> > >> >> }; > >> >> > >> >> #define SPI_FLASH_3B_ADDR_LEN 3 > >> >> > >> >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c > >> >> index 7d7c264..a5487ad 100644 > >> >> --- a/drivers/mtd/spi/sf_ops.c > >> >> +++ b/drivers/mtd/spi/sf_ops.c > >> >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash > >> >> *flash, u8 *rs) return 0; > >> >> > >> >> } > >> >> > >> >> +static int read_fsr(struct spi_flash *flash, u8 *fsr) > >> >> +{ > >> >> + int ret; > >> >> + u8 cmd; > >> >> + > >> >> + cmd = CMD_FLAG_STATUS; > >> >> + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); > >> >> + if (ret < 0) { > >> >> + debug("SF: fail to read flag status register\n"); > >> >> + return ret; > >> >> + } > >> >> + > >> >> + return 0; > >> >> +} > >> >> + > >> >> > >> >> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) > >> >> { > >> >> > >> >> u8 cmd; > >> >> > >> >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct > >> >> spi_flash *flash, u32 *addr) } > >> >> > >> >> #endif > >> >> > >> >> +static inline int spi_flash_sr_ready(struct spi_flash *flash) > >> >> +{ > >> >> + u8 sr; > >> >> + int ret; > >> >> + > >> >> + ret = spi_flash_cmd_read_status(flash, &sr); > >> >> + if (ret < 0) > >> >> + return ret; > >> >> + > >> >> + if (sr < 0) > >> > > >> > Have you ever seen u8 value that's < 0 ? :-) > >> > >> Yes, over looked, It's been fixed on next patches as well. > > > > Please don't apply broken code, fix this and repost. > > I don't know what your talking about, there is patch already submitted > with this fix and even you're CCed [1] > > [1] https://patchwork.ozlabs.org/patch/508166/ I am talking about not applying patches which are known to be defective. If you plan to apply this particular patch, make sure to fix it, repost it and then apply this. Do NOT apply a patch which is broken only to apply another patch which repairs the breakage, that's just nonsense.
On 19 August 2015 at 13:09, Marek Vasut <marex@denx.de> wrote: > On Wednesday, August 19, 2015 at 09:35:32 AM, Jagan Teki wrote: >> On 19 August 2015 at 04:28, Marek Vasut <marex@denx.de> wrote: >> > On Wednesday, August 19, 2015 at 12:36:40 AM, Jagan Teki wrote: >> >> On 19 August 2015 at 03:33, Marek Vasut <marex@denx.de> wrote: >> >> > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: >> >> >> This patch adds flag status register reading support to >> >> >> spi_flash_cmd_wait_ready. >> >> >> >> >> >> Signed-off-by: Jagan Teki <jteki@openedev.com> >> >> >> Cc: Simon Glass <sjg@chromium.org> >> >> >> Cc: Marek Vasut <marex@denx.de> >> >> >> Cc: Michal Simek <michal.simek@xilinx.com> >> >> >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> >> >> >> Cc: Stefan Roese <sr@denx.de> >> >> >> Cc: Tom Warren <twarren@nvidia.com> >> >> >> Cc: Bin Meng <bmeng.cn@gmail.com> >> >> >> Cc: Tom Rini <trini@konsulko.com> >> >> >> Cc: Hou Zhiqiang <B48286@freescale.com> >> >> >> Tested-by: Jagan Teki <jteki@openedev.com> >> >> >> --- >> >> >> >> >> >> drivers/mtd/spi/sf_internal.h | 1 + >> >> >> drivers/mtd/spi/sf_ops.c | 66 >> >> >> >> >> >> +++++++++++++++++++++++++++++++++++++++---- >> >> >> drivers/mtd/spi/sf_probe.c >> >> >> >> >> >> | 4 +-- >> >> >> >> >> >> include/spi_flash.h | 2 -- >> >> >> 4 files changed, 62 insertions(+), 11 deletions(-) >> >> >> >> >> >> diff --git a/drivers/mtd/spi/sf_internal.h >> >> >> b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644 >> >> >> --- a/drivers/mtd/spi/sf_internal.h >> >> >> +++ b/drivers/mtd/spi/sf_internal.h >> >> >> @@ -49,6 +49,7 @@ enum { >> >> >> >> >> >> enum spi_nor_option_flags { >> >> >> >> >> >> SNOR_F_SST_WR = (1 << 0), >> >> >> >> >> >> + SNOR_F_USE_FSR = (1 << 1), >> >> >> >> >> >> }; >> >> >> >> >> >> #define SPI_FLASH_3B_ADDR_LEN 3 >> >> >> >> >> >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c >> >> >> index 7d7c264..a5487ad 100644 >> >> >> --- a/drivers/mtd/spi/sf_ops.c >> >> >> +++ b/drivers/mtd/spi/sf_ops.c >> >> >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash >> >> >> *flash, u8 *rs) return 0; >> >> >> >> >> >> } >> >> >> >> >> >> +static int read_fsr(struct spi_flash *flash, u8 *fsr) >> >> >> +{ >> >> >> + int ret; >> >> >> + u8 cmd; >> >> >> + >> >> >> + cmd = CMD_FLAG_STATUS; >> >> >> + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); >> >> >> + if (ret < 0) { >> >> >> + debug("SF: fail to read flag status register\n"); >> >> >> + return ret; >> >> >> + } >> >> >> + >> >> >> + return 0; >> >> >> +} >> >> >> + >> >> >> >> >> >> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) >> >> >> { >> >> >> >> >> >> u8 cmd; >> >> >> >> >> >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct >> >> >> spi_flash *flash, u32 *addr) } >> >> >> >> >> >> #endif >> >> >> >> >> >> +static inline int spi_flash_sr_ready(struct spi_flash *flash) >> >> >> +{ >> >> >> + u8 sr; >> >> >> + int ret; >> >> >> + >> >> >> + ret = spi_flash_cmd_read_status(flash, &sr); >> >> >> + if (ret < 0) >> >> >> + return ret; >> >> >> + >> >> >> + if (sr < 0) >> >> > >> >> > Have you ever seen u8 value that's < 0 ? :-) >> >> >> >> Yes, over looked, It's been fixed on next patches as well. >> > >> > Please don't apply broken code, fix this and repost. >> >> I don't know what your talking about, there is patch already submitted >> with this fix and even you're CCed [1] >> >> [1] https://patchwork.ozlabs.org/patch/508166/ > > I am talking about not applying patches which are known to be defective. > If you plan to apply this particular patch, make sure to fix it, repost > it and then apply this. Do NOT apply a patch which is broken only to apply > another patch which repairs the breakage, that's just nonsense. Sorry, we are not here to apply broken patches, that you must understand clearly. And we haven't re-post the series yet, if you have any concerns just wait for next series and comment. Any applied patches before I have re-posted to ML then only applied. thanks!
On Wednesday, August 19, 2015 at 10:17:59 AM, Jagan Teki wrote: > On 19 August 2015 at 13:09, Marek Vasut <marex@denx.de> wrote: > > On Wednesday, August 19, 2015 at 09:35:32 AM, Jagan Teki wrote: > >> On 19 August 2015 at 04:28, Marek Vasut <marex@denx.de> wrote: > >> > On Wednesday, August 19, 2015 at 12:36:40 AM, Jagan Teki wrote: > >> >> On 19 August 2015 at 03:33, Marek Vasut <marex@denx.de> wrote: > >> >> > On Monday, August 17, 2015 at 12:32:54 PM, Jagan Teki wrote: > >> >> >> This patch adds flag status register reading support to > >> >> >> spi_flash_cmd_wait_ready. > >> >> >> > >> >> >> Signed-off-by: Jagan Teki <jteki@openedev.com> > >> >> >> Cc: Simon Glass <sjg@chromium.org> > >> >> >> Cc: Marek Vasut <marex@denx.de> > >> >> >> Cc: Michal Simek <michal.simek@xilinx.com> > >> >> >> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > >> >> >> Cc: Stefan Roese <sr@denx.de> > >> >> >> Cc: Tom Warren <twarren@nvidia.com> > >> >> >> Cc: Bin Meng <bmeng.cn@gmail.com> > >> >> >> Cc: Tom Rini <trini@konsulko.com> > >> >> >> Cc: Hou Zhiqiang <B48286@freescale.com> > >> >> >> Tested-by: Jagan Teki <jteki@openedev.com> > >> >> >> --- > >> >> >> > >> >> >> drivers/mtd/spi/sf_internal.h | 1 + > >> >> >> drivers/mtd/spi/sf_ops.c | 66 > >> >> >> > >> >> >> +++++++++++++++++++++++++++++++++++++++---- > >> >> >> drivers/mtd/spi/sf_probe.c > >> >> >> > >> >> >> | 4 +-- > >> >> >> > >> >> >> include/spi_flash.h | 2 -- > >> >> >> 4 files changed, 62 insertions(+), 11 deletions(-) > >> >> >> > >> >> >> diff --git a/drivers/mtd/spi/sf_internal.h > >> >> >> b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644 > >> >> >> --- a/drivers/mtd/spi/sf_internal.h > >> >> >> +++ b/drivers/mtd/spi/sf_internal.h > >> >> >> @@ -49,6 +49,7 @@ enum { > >> >> >> > >> >> >> enum spi_nor_option_flags { > >> >> >> > >> >> >> SNOR_F_SST_WR = (1 << 0), > >> >> >> > >> >> >> + SNOR_F_USE_FSR = (1 << 1), > >> >> >> > >> >> >> }; > >> >> >> > >> >> >> #define SPI_FLASH_3B_ADDR_LEN 3 > >> >> >> > >> >> >> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c > >> >> >> index 7d7c264..a5487ad 100644 > >> >> >> --- a/drivers/mtd/spi/sf_ops.c > >> >> >> +++ b/drivers/mtd/spi/sf_ops.c > >> >> >> @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash > >> >> >> *flash, u8 *rs) return 0; > >> >> >> > >> >> >> } > >> >> >> > >> >> >> +static int read_fsr(struct spi_flash *flash, u8 *fsr) > >> >> >> +{ > >> >> >> + int ret; > >> >> >> + u8 cmd; > >> >> >> + > >> >> >> + cmd = CMD_FLAG_STATUS; > >> >> >> + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); > >> >> >> + if (ret < 0) { > >> >> >> + debug("SF: fail to read flag status register\n"); > >> >> >> + return ret; > >> >> >> + } > >> >> >> + > >> >> >> + return 0; > >> >> >> +} > >> >> >> + > >> >> >> > >> >> >> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) > >> >> >> { > >> >> >> > >> >> >> u8 cmd; > >> >> >> > >> >> >> @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct > >> >> >> spi_flash *flash, u32 *addr) } > >> >> >> > >> >> >> #endif > >> >> >> > >> >> >> +static inline int spi_flash_sr_ready(struct spi_flash *flash) > >> >> >> +{ > >> >> >> + u8 sr; > >> >> >> + int ret; > >> >> >> + > >> >> >> + ret = spi_flash_cmd_read_status(flash, &sr); > >> >> >> + if (ret < 0) > >> >> >> + return ret; > >> >> >> + > >> >> >> + if (sr < 0) > >> >> > > >> >> > Have you ever seen u8 value that's < 0 ? :-) > >> >> > >> >> Yes, over looked, It's been fixed on next patches as well. > >> > > >> > Please don't apply broken code, fix this and repost. > >> > >> I don't know what your talking about, there is patch already submitted > >> with this fix and even you're CCed [1] > >> > >> [1] https://patchwork.ozlabs.org/patch/508166/ > > > > I am talking about not applying patches which are known to be defective. > > If you plan to apply this particular patch, make sure to fix it, repost > > it and then apply this. Do NOT apply a patch which is broken only to > > apply another patch which repairs the breakage, that's just nonsense. > > Sorry, we are not here to apply broken patches, that you must > understand clearly. I'm stopping this discussion here, sorry. > And we haven't re-post the series yet, if you have any concerns just wait > for next series and comment. Any applied patches before I have re-posted > to ML then only applied. Sorry, I don't understand this sentence. > thanks!
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index e97c716..4ecfd0c 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -49,6 +49,7 @@ enum { enum spi_nor_option_flags { SNOR_F_SST_WR = (1 << 0), + SNOR_F_USE_FSR = (1 << 1), }; #define SPI_FLASH_3B_ADDR_LEN 3 diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 7d7c264..a5487ad 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -40,6 +40,21 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs) return 0; } +static int read_fsr(struct spi_flash *flash, u8 *fsr) +{ + int ret; + u8 cmd; + + cmd = CMD_FLAG_STATUS; + ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); + if (ret < 0) { + debug("SF: fail to read flag status register\n"); + return ret; + } + + return 0; +} + int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws) { u8 cmd; @@ -138,24 +153,63 @@ static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr) } #endif +static inline int spi_flash_sr_ready(struct spi_flash *flash) +{ + u8 sr; + int ret; + + ret = spi_flash_cmd_read_status(flash, &sr); + if (ret < 0) + return ret; + + if (sr < 0) + return sr; + else + return !(sr & STATUS_WIP); +} + +static inline int spi_flash_fsr_ready(struct spi_flash *flash) +{ + u8 fsr; + int ret; + + ret = read_fsr(flash, &fsr); + if (ret < 0) + return ret; + + if (fsr < 0) + return fsr; + else + return fsr & STATUS_PEC; +} + +static int spi_flash_ready(struct spi_flash *flash) +{ + int sr, fsr; + sr = spi_flash_sr_ready(flash); + if (sr < 0) + return sr; + fsr = flash->flags & SNOR_F_USE_FSR ? spi_flash_fsr_ready(flash) : 1; + if (fsr < 0) + return fsr; + return sr && fsr; +} + /* * Service routine to read status register until ready, or timeout occurs. * Returns non-zero if error. */ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long deadline) { - int timeout, ret, sr; + int timeout, ret; timeout = get_timer(0); while (get_timer(timeout) < deadline) { - ret = spi_flash_cmd_read_status(flash, &sr); + ret = spi_flash_ready(flash); if (ret < 0) return ret; - - if (sr < 0) - break; - else if (!(sr & STATUS_WIP)) + if (ret) return 0; cond_resched(); diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 1de2bbb..fb79b02 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -256,11 +256,9 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, flash->dummy_byte = 1; } - /* Poll cmd selection */ - flash->poll_cmd = CMD_READ_STATUS; #ifdef CONFIG_SPI_FLASH_STMICRO if (params->flags & E_FSR) - flash->poll_cmd = CMD_FLAG_STATUS; + flash->flags |= SNOR_F_USE_FSR; #endif /* Configure the BAR - discover bank cmds and read current bank */ diff --git a/include/spi_flash.h b/include/spi_flash.h index 8d85468..4312d3d 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -49,7 +49,6 @@ struct spi_slave; * @bank_read_cmd: Bank read cmd * @bank_write_cmd: Bank write cmd * @bank_curr: Current flash bank - * @poll_cmd: Poll cmd - for flash erase/program * @erase_cmd: Erase cmd 4K, 32K, 64K * @read_cmd: Read cmd - Array Fast, Extn read and quad read. * @write_cmd: Write cmd - page and quad program. @@ -82,7 +81,6 @@ struct spi_flash { u8 bank_write_cmd; u8 bank_curr; #endif - u8 poll_cmd; u8 erase_cmd; u8 read_cmd; u8 write_cmd;