@@ -853,6 +853,7 @@ initial_mmu:
*/
addi r10, r10, 0x0100
mtspr SPRN_MD_CTR, r10
+#endif
lis r8, KERNELBASE@h /* Create vaddr for TLB */
addis r8, r8, 0x0080 /* Add 8M */
@@ -865,6 +866,7 @@ initial_mmu:
addis r11, r11, 0x0080 /* Add 8M */
mtspr SPRN_MD_RPN, r11
+#ifdef CONFIG_PIN_TLB
addi r10, r10, 0x0100
mtspr SPRN_MD_CTR, r10
@@ -144,7 +144,7 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
/* 8xx can only access 24MB at the moment */
memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01800000));
#else
- /* 8xx can only access 8MB at the moment */
- memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000));
+ /* 8xx can only access 16MB at the moment */
+ memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01000000));
#endif
}
On recent kernels, with some debug options like for instance CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough the kernel code fits in the first 8M. Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M at startup, allthough pinning TLB is not necessary for that. This patch adds a second 8M page to the initial mapping in order to have 16M mapped regardless of CONFIG_PIN_TLB, like several other 32 bits PPC (40x, 601, ...) Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> --- arch/powerpc/kernel/head_8xx.S | 2 ++ arch/powerpc/mm/8xx_mmu.c | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-)