| Message ID | 1439372447-7352-2-git-send-email-Peng.Fan@freescale.com |
|---|---|
| State | Superseded |
| Headers | show |
Hi Peng, On Wed, Aug 12, 2015 at 4:40 AM, Peng Fan <Peng.Fan@freescale.com> wrote: > The MIB RAM and FIFO receive start register does not exist on > i.MX6UL. Accessing these register will cause enet not work well. > > Signed-off-by: Peng Fan <Peng.Fan@freescale.com> > Signed-off-by: Fugang Duan <B38611@freescale.com> > Cc: Joe Hershberger <joe.hershberger@ni.com> > Cc: Stefano Babic <sbabic@denx.de> Looks reasonable to me. Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
On 12/08/2015 11:40, Peng Fan wrote: > The MIB RAM and FIFO receive start register does not exist on > i.MX6UL. Accessing these register will cause enet not work well. > > Signed-off-by: Peng Fan <Peng.Fan@freescale.com> > Signed-off-by: Fugang Duan <B38611@freescale.com> > Cc: Joe Hershberger <joe.hershberger@ni.com> > Cc: Stefano Babic <sbabic@denx.de> > --- > > Changes v2: > Using runtime check, but not hardcoding "#ifdef". > This patch depends on the runtime checking patch: > https://patchwork.ozlabs.org/patch/505621/. > > drivers/net/fec_mxc.c | 14 +++++++++----- > 1 file changed, 9 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > index c5dcbbb..bff5fd1 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -17,6 +17,7 @@ > > #include <asm/arch/clock.h> > #include <asm/arch/imx-regs.h> > +#include <asm/imx-common/sys_proto.h> > #include <asm/io.h> > #include <asm/errno.h> > #include <linux/compiler.h> > @@ -551,12 +552,15 @@ static int fec_init(struct eth_device *dev, bd_t* bd) > writel(0x00000000, &fec->eth->gaddr2); > > > - /* clear MIB RAM */ > - for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) > - writel(0, i); > + /* Do not access reserved register for i.MX6UL */ > + if (!is_cpu_type(MXC_CPU_MX6UL)) { > + /* clear MIB RAM */ > + for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) > + writel(0, i); > > - /* FIFO receive start register */ > - writel(0x520, &fec->eth->r_fstart); > + /* FIFO receive start register */ > + writel(0x520, &fec->eth->r_fstart); > + } > > /* size and address of each buffer */ > writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr); > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic
Hi Peng, On 23/08/2015 17:43, Stefano Babic wrote: > On 12/08/2015 11:40, Peng Fan wrote: >> The MIB RAM and FIFO receive start register does not exist on >> i.MX6UL. Accessing these register will cause enet not work well. >> >> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> >> Signed-off-by: Fugang Duan <B38611@freescale.com> >> Cc: Joe Hershberger <joe.hershberger@ni.com> >> Cc: Stefano Babic <sbabic@denx.de> >> --- >> >> Changes v2: >> Using runtime check, but not hardcoding "#ifdef". >> This patch depends on the runtime checking patch: >> https://patchwork.ozlabs.org/patch/505621/. >> >> drivers/net/fec_mxc.c | 14 +++++++++----- >> 1 file changed, 9 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c >> index c5dcbbb..bff5fd1 100644 >> --- a/drivers/net/fec_mxc.c >> +++ b/drivers/net/fec_mxc.c >> @@ -17,6 +17,7 @@ >> >> #include <asm/arch/clock.h> >> #include <asm/arch/imx-regs.h> >> +#include <asm/imx-common/sys_proto.h> >> #include <asm/io.h> >> #include <asm/errno.h> >> #include <linux/compiler.h> >> @@ -551,12 +552,15 @@ static int fec_init(struct eth_device *dev, bd_t* bd) >> writel(0x00000000, &fec->eth->gaddr2); >> >> >> - /* clear MIB RAM */ >> - for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) >> - writel(0, i); >> + /* Do not access reserved register for i.MX6UL */ >> + if (!is_cpu_type(MXC_CPU_MX6UL)) { >> + /* clear MIB RAM */ >> + for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) >> + writel(0, i); >> >> - /* FIFO receive start register */ >> - writel(0x520, &fec->eth->r_fstart); >> + /* FIFO receive start register */ >> + writel(0x520, &fec->eth->r_fstart); >> + } >> >> /* size and address of each buffer */ >> writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr); >> > Patch is already applied - however, I have found that this break build for vf610 boards (they have not a get_cpu_rev()). You can check with the current u-boot-imx. Can you take a look, please ? Thanks, Stefano Babic
Hi Stefano, On Mon, Aug 31, 2015 at 07:14:06PM +0200, Stefano Babic wrote: >Hi Peng, > >On 23/08/2015 17:43, Stefano Babic wrote: >> On 12/08/2015 11:40, Peng Fan wrote: >>> The MIB RAM and FIFO receive start register does not exist on >>> i.MX6UL. Accessing these register will cause enet not work well. >>> >>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> >>> Signed-off-by: Fugang Duan <B38611@freescale.com> >>> Cc: Joe Hershberger <joe.hershberger@ni.com> >>> Cc: Stefano Babic <sbabic@denx.de> >>> --- >>> >>> Changes v2: >>> Using runtime check, but not hardcoding "#ifdef". >>> This patch depends on the runtime checking patch: >>> https://patchwork.ozlabs.org/patch/505621/. >>> >>> drivers/net/fec_mxc.c | 14 +++++++++----- >>> 1 file changed, 9 insertions(+), 5 deletions(-) >>> >>> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c >>> index c5dcbbb..bff5fd1 100644 >>> --- a/drivers/net/fec_mxc.c >>> +++ b/drivers/net/fec_mxc.c >>> @@ -17,6 +17,7 @@ >>> >>> #include <asm/arch/clock.h> >>> #include <asm/arch/imx-regs.h> >>> +#include <asm/imx-common/sys_proto.h> >>> #include <asm/io.h> >>> #include <asm/errno.h> >>> #include <linux/compiler.h> >>> @@ -551,12 +552,15 @@ static int fec_init(struct eth_device *dev, bd_t* bd) >>> writel(0x00000000, &fec->eth->gaddr2); >>> >>> >>> - /* clear MIB RAM */ >>> - for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) >>> - writel(0, i); >>> + /* Do not access reserved register for i.MX6UL */ >>> + if (!is_cpu_type(MXC_CPU_MX6UL)) { >>> + /* clear MIB RAM */ >>> + for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) >>> + writel(0, i); >>> >>> - /* FIFO receive start register */ >>> - writel(0x520, &fec->eth->r_fstart); >>> + /* FIFO receive start register */ >>> + writel(0x520, &fec->eth->r_fstart); >>> + } >>> >>> /* size and address of each buffer */ >>> writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr); >>> >> > >Patch is already applied - however, I have found that this break build >for vf610 boards (they have not a get_cpu_rev()). You can check with the >current u-boot-imx. > Sorry, I checked all i.MXes, but missed vf610. >Can you take a look, please ? I worked a simple patch: https://patchwork.ozlabs.org/patch/512669/ Add an empty function to avoid build errors. Current we do not have drivers to check vf610 cpu types, later if we need saying "is_cpu_type(VF610)", we can add more stuff to the function get_cpu_rev for vf610. Regards, Peng. > >Thanks, >Stefano Babic > > >-- >===================================================================== >DENX Software Engineering GmbH, Managing Director: Wolfgang Denk >HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany >Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de >=====================================================================
Hi Peng, On 01/09/2015 02:32, Peng Fan wrote: >> Patch is already applied - however, I have found that this break build >> for vf610 boards (they have not a get_cpu_rev()). You can check with the >> current u-boot-imx. >> > > Sorry, I checked all i.MXes, but missed vf610. No problem - we fix it ! > >> Can you take a look, please ? > > I worked a simple patch: https://patchwork.ozlabs.org/patch/512669/ > Add an empty function to avoid build errors. Current we do not have > drivers to check vf610 cpu types, later if we need saying > "is_cpu_type(VF610)", we can add more stuff to the function get_cpu_rev > for vf610. > I hoped to have a right get_cpu_rev() for VF610, too. Then I checked in the VF610 manual, but I found revision only for specific controllers - EHCI, etc. I have not found anything equivalent, but maybe it is better hidden. Of course, we can do with an empty function if we have not something better. Maybe do you can check in Freescale if there is a way to get the cpu revision instead of a dummy ? Thanks, Stefano Babic
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index c5dcbbb..bff5fd1 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -17,6 +17,7 @@ #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> +#include <asm/imx-common/sys_proto.h> #include <asm/io.h> #include <asm/errno.h> #include <linux/compiler.h> @@ -551,12 +552,15 @@ static int fec_init(struct eth_device *dev, bd_t* bd) writel(0x00000000, &fec->eth->gaddr2); - /* clear MIB RAM */ - for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) - writel(0, i); + /* Do not access reserved register for i.MX6UL */ + if (!is_cpu_type(MXC_CPU_MX6UL)) { + /* clear MIB RAM */ + for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) + writel(0, i); - /* FIFO receive start register */ - writel(0x520, &fec->eth->r_fstart); + /* FIFO receive start register */ + writel(0x520, &fec->eth->r_fstart); + } /* size and address of each buffer */ writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr);