@@ -19,6 +19,7 @@
#include <asm/emif.h>
#include <asm/arch/gpio.h>
#include <asm/omap_common.h>
+#include <asm/pl310.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -35,6 +36,13 @@ static const struct gpio_bank gpio_bank_44xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_44xx;
+#ifndef CONFIG_SPL_BUILD
+void pl310_write_aux_ctrl(u32 aux_ctrl)
+{
+ omap_smc1(OMAP4_SERVICE_PL310_AUXCTRL_REG_SET, aux_ctrl);
+}
+#endif
+
#ifdef CONFIG_SPL_BUILD
/*
* Some tuning of IOs for optimal power and performance
@@ -227,6 +227,10 @@ skip_errata_430973:
skip_errata_621766:
#endif
+#ifdef CONFIG_SYS_L2_PL310
+ bl pl310_erratum_implement
+#endif /* CONFIG_SYS_L2_PL310 */
+
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)
@@ -58,5 +58,6 @@ void force_emif_self_refresh(void);
void setup_warmreset_time(void);
#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102
+#define OMAP4_SERVICE_PL310_AUXCTRL_REG_SET 0x109
#endif
@@ -142,6 +142,7 @@ void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
u32 cpu_rev);
void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
u32 cpu_variant, u32 cpu_rev);
+void pl310_erratum_implement(void);
#endif /* ! __ASSEMBLY__ */
#endif
@@ -12,6 +12,7 @@
/* Register bit fields */
#define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16)
+#define PL310_AUX_CTRL_SHARED_ATTRIB_OVERRIDE_EN (1 << 22)
#define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1)
#define L2X0_STNDBY_MODE_EN (1 << 0)
#define L2X0_CTRL_EN 1
@@ -74,5 +75,6 @@ void pl310_inval_all(void);
void pl310_clean_inval_all(void);
void pl310_inval_range(u32 start, u32 end);
void pl310_clean_inval_range(u32 start, u32 end);
+void pl310_write_aux_ctrl(u32 aux_ctrl);
#endif
@@ -14,6 +14,21 @@
struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+/* Override in platform code based on secure access needs */
+void __weak pl310_write_aux_ctrl(u32 aux_ctrl)
+{
+ writel(aux_ctrl, &pl310->pl310_aux_ctrl);
+}
+
+void pl310_erratum_implement(void)
+{
+ u32 __maybe_unused reg = 0;
+#ifdef CONFIG_ARM_PL310_ERRATA_xyz
+ reg = readl(&pl310->pl310_aux_ctrl);
+ pl310_write_aux_ctrl(reg | PL310_AUX_CTRL_SHARED_ATTRIB_OVERRIDE_EN);
+#endif
+}
+
static void pl310_cache_sync(void)
{
writel(0, &pl310->pl310_cache_sync);
@@ -23,9 +23,10 @@
#define CONFIG_SYS_THUMB_BUILD
-#ifndef CONFIG_SYS_L2CACHE_OFF
+#if !defined(CONFIG_SYS_L2CACHE_OFF) && !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_L2_PL310 1
#define CONFIG_SYS_PL310_BASE 0x48242000
+#define CONFIG_ARM_PL310_ERRATA_xyz
#endif
#define CONFIG_SYS_CACHELINE_SIZE 32