diff mbox

[U-Boot,v2] arm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board

Message ID 1418117882-43525-1-git-send-email-b18965@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Alison Wang Dec. 9, 2014, 9:38 a.m. UTC 
This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
Change log:
 v2: Rebase the patch.

 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  1 +
 board/freescale/ls1021aqds/MAINTAINERS            |  1 +
 board/freescale/ls1021aqds/ls1021aqds.c           |  8 ++++++
 board/freescale/ls1021atwr/MAINTAINERS            |  1 +
 board/freescale/ls1021atwr/ls1021atwr.c           | 14 ++++++++++
 configs/ls1021aqds_qspi_defconfig                 |  3 ++
 configs/ls1021atwr_qspi_defconfig                 |  3 ++
 include/configs/ls1021aqds.h                      | 34 +++++++++++++++++++++++
 include/configs/ls1021atwr.h                      | 28 +++++++++++++++++++
 9 files changed, 93 insertions(+)
 create mode 100644 configs/ls1021aqds_qspi_defconfig
 create mode 100644 configs/ls1021atwr_qspi_defconfig

Comments

York Sun Dec. 10, 2014, 1:04 a.m. UTC | #1 
On 12/09/2014 01:38 AM, Alison Wang wrote:
> This patch adds QSPI boot support for LS1021AQDS/TWR board.
> The QSPI boot image need to be programmed into the QSPI flash
> first. Then the booting will start from QSPI memory space.
> 
> Signed-off-by: Alison Wang <alison.wang@freescale.com>
> ---
> Change log:
>  v2: Rebase the patch.
> 

<snip>

> diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
> index 6a6f620..653dbef 100644
> --- a/include/configs/ls1021aqds.h
> +++ b/include/configs/ls1021aqds.h

<snip>

> @@ -315,7 +334,11 @@
>  #define CONFIG_CMDLINE_TAG
>  #define CONFIG_CMDLINE_EDITING
>  
> +#ifdef CONFIG_QSPI_BOOT
> +#undef CONFIG_CMD_IMLS
> +#else
>  #define CONFIG_CMD_IMLS
> +#endif
>  
Is it necessary to undef?

York
alison wang Dec. 10, 2014, 2:30 a.m. UTC | #2 
Hi, York,

> On 12/09/2014 01:38 AM, Alison Wang wrote:
> > This patch adds QSPI boot support for LS1021AQDS/TWR board.
> > The QSPI boot image need to be programmed into the QSPI flash first.
> > Then the booting will start from QSPI memory space.
> >
> > Signed-off-by: Alison Wang <alison.wang@freescale.com>
> > ---
> > Change log:
> >  v2: Rebase the patch.
> >
> 
> <snip>
> 
> > diff --git a/include/configs/ls1021aqds.h
> > b/include/configs/ls1021aqds.h index 6a6f620..653dbef 100644
> > --- a/include/configs/ls1021aqds.h
> > +++ b/include/configs/ls1021aqds.h
> 
> <snip>
> 
> > @@ -315,7 +334,11 @@
> >  #define CONFIG_CMDLINE_TAG
> >  #define CONFIG_CMDLINE_EDITING
> >
> > +#ifdef CONFIG_QSPI_BOOT
> > +#undef CONFIG_CMD_IMLS
> > +#else
> >  #define CONFIG_CMD_IMLS
> > +#endif
> >
> Is it necessary to undef?
> 
[Alison Wang] It is necessary, because this file includes "include/config_cmd_default.h". In include/config_cmd_default.h, CONFIG_CMD_IMLS is defined.

Thanks.


Best Regards,
Alison Wang
alison wang Dec. 10, 2014, 2:38 a.m. UTC | #3 
York,

> > On 12/09/2014 01:38 AM, Alison Wang wrote:
> > > This patch adds QSPI boot support for LS1021AQDS/TWR board.
> > > The QSPI boot image need to be programmed into the QSPI flash first.
> > > Then the booting will start from QSPI memory space.
> > >
> > > Signed-off-by: Alison Wang <alison.wang@freescale.com>
> > > ---
> > > Change log:
> > >  v2: Rebase the patch.
> > >
> >
> > <snip>
> >
> > > diff --git a/include/configs/ls1021aqds.h
> > > b/include/configs/ls1021aqds.h index 6a6f620..653dbef 100644
> > > --- a/include/configs/ls1021aqds.h
> > > +++ b/include/configs/ls1021aqds.h
> >
> > <snip>
> >
> > > @@ -315,7 +334,11 @@
> > >  #define CONFIG_CMDLINE_TAG
> > >  #define CONFIG_CMDLINE_EDITING
> > >
> > > +#ifdef CONFIG_QSPI_BOOT
> > > +#undef CONFIG_CMD_IMLS
> > > +#else
> > >  #define CONFIG_CMD_IMLS
> > > +#endif
> > >
> > Is it necessary to undef?
> >
> [Alison Wang] It is necessary, because this file includes
> "include/config_cmd_default.h". In include/config_cmd_default.h,
> CONFIG_CMD_IMLS is defined.
> 
> Thanks.
[Alison Wang] I may misunderstand your meaning. For QSPI boot, IFC is disabled because IFC and QSPI are pin multiplexed, so CONFIG_CMD_IMLS should not be defined too.


Best Regards,
Alison Wang
York Sun Dec. 11, 2014, 7:05 p.m. UTC | #4 
On 12/09/2014 01:38 AM, Alison Wang wrote:
> This patch adds QSPI boot support for LS1021AQDS/TWR board.
> The QSPI boot image need to be programmed into the QSPI flash
> first. Then the booting will start from QSPI memory space.
> 
> Signed-off-by: Alison Wang <alison.wang@freescale.com>
> ---
> Change log:
>  v2: Rebase the patch.
> 

Applied to u-boot-fsl-qoriq master, awaiting upstream.

York
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 44a2c86..d965426 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -101,6 +101,7 @@  struct ccsr_gur {
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0xf8001a0f
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_PIXCLKCR_PXCKEN		0x80000000
+#define SCFG_QSPI_CLKSEL		0xc0100000
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
diff --git a/board/freescale/ls1021aqds/MAINTAINERS b/board/freescale/ls1021aqds/MAINTAINERS
index 962176b..7a704cf 100644
--- a/board/freescale/ls1021aqds/MAINTAINERS
+++ b/board/freescale/ls1021aqds/MAINTAINERS
@@ -7,3 +7,4 @@  F:	configs/ls1021aqds_nor_defconfig
 F:	configs/ls1021aqds_ddr4_nor_defconfig
 F:	configs/ls1021aqds_nor_SECURE_BOOT_defconfig
 F:	configs/ls1021aqds_sdcard_defconfig
+F:	configs/ls1021aqds_qspi_defconfig
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 3d6292e..56635f9 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -50,7 +50,9 @@  enum {
 
 int checkboard(void)
 {
+#ifndef CONFIG_QSPI_BOOT
 	char buf[64];
+#endif
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT)
 	u8 sw;
 #endif
@@ -77,12 +79,14 @@  int checkboard(void)
 		printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
 #endif
 
+#ifndef CONFIG_QSPI_BOOT
 	printf("Sys ID:0x%02x, Sys Ver: 0x%02x\n",
 	       QIXIS_READ(id), QIXIS_READ(arch));
 
 	printf("FPGA:  v%d (%s), build %d\n",
 	       (int)QIXIS_READ(scver), qixis_read_tag(buf),
 	       (int)qixis_read_minor());
+#endif
 
 	return 0;
 }
@@ -180,6 +184,10 @@  int board_early_init_f(void)
 	init_early_memctl_regs();
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#endif
+
 	/* Workaround for the issue that DDR could not respond to
 	 * barrier transaction which is generated by executing DSB/ISB
 	 * instruction. Set CCI-400 control override register to
diff --git a/board/freescale/ls1021atwr/MAINTAINERS b/board/freescale/ls1021atwr/MAINTAINERS
index 2312e00..9176706 100644
--- a/board/freescale/ls1021atwr/MAINTAINERS
+++ b/board/freescale/ls1021atwr/MAINTAINERS
@@ -6,3 +6,4 @@  F:	include/configs/ls1021atwr.h
 F:	configs/ls1021atwr_nor_defconfig
 F:	configs/ls1021atwr_nor_SECURE_BOOT_defconfig
 F:	configs/ls1021atwr_sdcard_defconfig
+F:	configs/ls1021atwr_qspi_defconfig
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 6f6196b..8ab229d 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -74,6 +74,7 @@  struct cpld_data {
 	u8 rev2;		/* Reserved */
 };
 
+#ifndef CONFIG_QSPI_BOOT
 static void convert_serdes_mux(int type, int need_reset);
 
 void cpld_show(void)
@@ -109,11 +110,14 @@  void cpld_show(void)
 	       in_8(&cpld_data->serdes_mux));
 #endif
 }
+#endif
 
 int checkboard(void)
 {
 	puts("Board: LS1021ATWR\n");
+#ifndef CONFIG_QSPI_BOOT
 	cpld_show();
+#endif
 
 	return 0;
 }
@@ -222,6 +226,7 @@  int board_eth_init(bd_t *bis)
 }
 #endif
 
+#ifndef CONFIG_QSPI_BOOT
 int config_serdes_mux(void)
 {
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -253,6 +258,7 @@  int config_serdes_mux(void)
 
 	return 0;
 }
+#endif
 
 int board_early_init_f(void)
 {
@@ -271,6 +277,10 @@  int board_early_init_f(void)
 	out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#endif
+
 	return 0;
 }
 
@@ -410,8 +420,10 @@  int board_init(void)
 
 #ifndef CONFIG_SYS_FSL_NO_SERDES
 	fsl_serdes_init();
+#ifndef CONFIG_QSPI_BOOT
 	config_serdes_mux();
 #endif
+#endif
 
 	ls102xa_config_smmu_stream_id(dev_stream_id,
 				      ARRAY_SIZE(dev_stream_id));
@@ -466,6 +478,7 @@  u16 flash_read16(void *addr)
 	return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
 }
 
+#ifndef CONFIG_QSPI_BOOT
 static void convert_flash_bank(char bank)
 {
 	struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
@@ -648,3 +661,4 @@  U_BOOT_CMD(
 	"	-change lane C & lane D to PCIeX2\n"
 	"\nWARNING: If you aren't familiar with the setting of serdes, don't try to change anything!\n"
 );
+#endif
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
new file mode 100644
index 0000000..05ec8e6
--- /dev/null
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -0,0 +1,3 @@ 
+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_LS1021AQDS=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
new file mode 100644
index 0000000..611f6e8
--- /dev/null
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -0,0 +1,3 @@ 
+CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_LS1021ATWR=y
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 6a6f620..653dbef 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -37,8 +37,14 @@  unsigned long get_board_sys_clk(void);
 unsigned long get_board_ddr_clk(void);
 #endif
 
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_SYS_CLK_FREQ		100000000
+#define CONFIG_DDR_CLK_FREQ		100000000
+#define CONFIG_QIXIS_I2C_ACCESS
+#else
 #define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ		get_board_ddr_clk()
+#endif
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI	board/freescale/ls1021aqds/ls102xa_pbi.cfg
@@ -73,6 +79,11 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MONITOR_LEN		0x80000
 #endif
 
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_SYS_TEXT_BASE		0x40010000
+#define CONFIG_SYS_NO_FLASH
+#endif
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE		0x67f80000
 #endif
@@ -112,6 +123,7 @@  unsigned long get_board_ddr_clk(void);
 /*
  * IFC Definitions
  */
+#ifndef CONFIG_QSPI_BOOT
 #define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE		0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
@@ -204,6 +216,7 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_NAND
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#endif
 
 /*
  * QIXIS Definitions
@@ -316,6 +329,18 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+/* QSPI */
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_FSL_QSPI
+#define QSPI0_AMBA_BASE			0x40000000
+#define FSL_QSPI_FLASH_SIZE		(1 << 24)
+#define FSL_QSPI_FLASH_NUM		2
+
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#endif
+
 /*
  * USB
  */
@@ -394,7 +419,11 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_CMDLINE_EDITING
 
+#ifdef CONFIG_QSPI_BOOT
+#undef CONFIG_CMD_IMLS
+#else
 #define CONFIG_CMD_IMLS
+#endif
 
 #define CONFIG_ARMV7_NONSEC
 #define CONFIG_ARMV7_VIRT
@@ -468,6 +497,11 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_ENV_SIZE			0x2000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE			0x2000          /* 8KB */
+#define CONFIG_ENV_OFFSET		0x100000        /* 1MB */
+#define CONFIG_ENV_SECT_SIZE		0x10000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 9a497a6..2713ae4 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -95,6 +95,11 @@ 
 #define CONFIG_SYS_MONITOR_LEN		0x80000
 #endif
 
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_SYS_TEXT_BASE		0x40010000
+#define CONFIG_SYS_NO_FLASH
+#endif
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE		0x67f80000
 #endif
@@ -118,6 +123,7 @@ 
 /*
  * IFC Definitions
  */
+#ifndef CONFIG_QSPI_BOOT
 #define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE		0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
@@ -161,6 +167,7 @@ 
 
 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
+#endif
 
 /* CPLD */
 
@@ -244,6 +251,18 @@ 
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+/* QSPI */
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_FSL_QSPI
+#define QSPI0_AMBA_BASE			0x40000000
+#define FSL_QSPI_FLASH_SIZE		(1 << 24)
+#define FSL_QSPI_FLASH_NUM		2
+
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#endif
+
 /*
  * Video
  */
@@ -315,7 +334,11 @@ 
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_CMDLINE_EDITING
 
+#ifdef CONFIG_QSPI_BOOT
+#undef CONFIG_CMD_IMLS
+#else
 #define CONFIG_CMD_IMLS
+#endif
 
 #define CONFIG_ARMV7_NONSEC
 #define CONFIG_ARMV7_VIRT
@@ -388,6 +411,11 @@ 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_ENV_SIZE			0x20000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_ENV_OFFSET		0x100000
+#define CONFIG_ENV_SECT_SIZE		0x10000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)