| Message ID | 1415364634-8290-3-git-send-email-sr@denx.de |
|---|---|
| State | Accepted |
| Delegated to: | Marek Vasut |
| Headers | show |
On Fri 2014-11-07 13:50:30, Stefan Roese wrote: > This function will be needed by the upcoming Designware master SPI > driver. As the SPI master controller is held in reset by the current > Preloader implementation. So we need to release the reset for the > driver to communicate with the controller. > > This function is called from arch_early_init_r() if the SPI > driver is enabled. > > } > } > + > +/* SPI Master enable (its held in reset by the preloader) */ > +void socfpga_spim_enable(void) > +{ > + const void *reset = &reset_manager_base->per_mod_reset; > + > + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SPIM0_LSB); > + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SPIM1_LSB); Actually, you can do this with one clrbits, right? Pavel
On 12.11.2014 18:42, Pavel Machek wrote: > On Fri 2014-11-07 13:50:30, Stefan Roese wrote: >> This function will be needed by the upcoming Designware master SPI >> driver. As the SPI master controller is held in reset by the current >> Preloader implementation. So we need to release the reset for the >> driver to communicate with the controller. >> >> This function is called from arch_early_init_r() if the SPI >> driver is enabled. >> >> } >> } >> + >> +/* SPI Master enable (its held in reset by the preloader) */ >> +void socfpga_spim_enable(void) >> +{ >> + const void *reset = &reset_manager_base->per_mod_reset; >> + >> + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SPIM0_LSB); >> + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SPIM1_LSB); > > Actually, you can do this with one clrbits, right? Yes, will send a follow-up patch for this. Thanks, Stefan
diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index 8c3e5f7..73cffd3 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -202,6 +202,12 @@ int arch_early_init_r(void) /* Add device descriptor to FPGA device table */ socfpga_fpga_add(); + +#ifdef CONFIG_DESIGNWARE_SPI + /* Get Designware SPI controller out of reset */ + socfpga_spim_enable(); +#endif + return 0; } diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c index 1d3a95d..af9db85 100644 --- a/arch/arm/cpu/armv7/socfpga/reset_manager.c +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c @@ -104,3 +104,12 @@ void socfpga_emac_reset(int enable) #endif } } + +/* SPI Master enable (its held in reset by the preloader) */ +void socfpga_spim_enable(void) +{ + const void *reset = &reset_manager_base->per_mod_reset; + + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SPIM0_LSB); + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SPIM1_LSB); +} diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h index 1857b80..034135b 100644 --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h @@ -14,6 +14,7 @@ void socfpga_bridges_reset(int enable); void socfpga_emac_reset(int enable); void socfpga_watchdog_reset(void); +void socfpga_spim_enable(void); struct socfpga_reset_manager { u32 status; @@ -35,5 +36,7 @@ struct socfpga_reset_manager { #define RSTMGR_PERMODRST_EMAC0_LSB 0 #define RSTMGR_PERMODRST_EMAC1_LSB 1 #define RSTMGR_PERMODRST_L4WD0_LSB 6 +#define RSTMGR_PERMODRST_SPIM0_LSB 18 +#define RSTMGR_PERMODRST_SPIM1_LSB 19 #endif /* _RESET_MANAGER_H_ */
This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> --- arch/arm/cpu/armv7/socfpga/misc.c | 6 ++++++ arch/arm/cpu/armv7/socfpga/reset_manager.c | 9 +++++++++ arch/arm/include/asm/arch-socfpga/reset_manager.h | 3 +++ 3 files changed, 18 insertions(+)