diff mbox

[U-Boot,19/35] arm: socfpga: reset: Add EMAC reset functions

Message ID 1410779188-6880-20-git-send-email-marex@denx.de
State Superseded
Delegated to: Marek Vasut
Headers show

Commit Message

Marek Vasut Sept. 15, 2014, 11:06 a.m. UTC 
Add functions to reset the EMAC ethernet blocks. We cannot handle
two EMAC ethernet blocks yet, therefore the ifdefs. Once there is
hardware using both EMAC blocks, this ifdef will have to go.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
---
 arch/arm/cpu/armv7/socfpga/reset_manager.c        | 21 +++++++++++++++++++++
 arch/arm/include/asm/arch-socfpga/reset_manager.h |  2 ++
 2 files changed, 23 insertions(+)

Comments

Pavel Machek Sept. 15, 2014, 9:26 p.m. UTC | #1 
On Mon 2014-09-15 13:06:12, Marek Vasut wrote:
> Add functions to reset the EMAC ethernet blocks. We cannot handle
> two EMAC ethernet blocks yet, therefore the ifdefs. Once there is
> hardware using both EMAC blocks, this ifdef will have to go.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@altera.com>
> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> Cc: Tom Rini <trini@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>

Acked-by: Pavel Machek <pavel@denx.de>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c
index 07b8c4f..77579b7 100644
--- a/arch/arm/cpu/armv7/socfpga/reset_manager.c
+++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c
@@ -14,6 +14,8 @@  DECLARE_GLOBAL_DATA_PTR;
 static const struct socfpga_reset_manager *reset_manager_base =
 		(void *)SOCFPGA_RSTMGR_ADDRESS;
 
+#define RSTMGR_PERMODRST_EMAC0_LSB 0
+#define RSTMGR_PERMODRST_EMAC1_LSB 1
 #define RSTMGR_PERMODRST_L4WD0_LSB 6
 
 /* Disable the watchdog (toggle reset to watchdog) */
@@ -50,3 +52,22 @@  void reset_deassert_peripherals_handoff(void)
 {
 	writel(0, &reset_manager_base->per_mod_reset);
 }
+
+/* Change the reset state for EMAC 0 and EMAC 1 */
+void socfpga_emac_reset(int enable)
+{
+	const void *reset = &reset_manager_base->per_mod_reset;
+
+	if (enable) {
+		setbits_le32(reset, 1 << RSTMGR_PERMODRST_EMAC0_LSB);
+		setbits_le32(reset, 1 << RSTMGR_PERMODRST_EMAC1_LSB);
+	} else {
+#if (CONFIG_EMAC_BASE == SOCFPGA_EMAC0_ADDRESS)
+		clrbits_le32(reset, 1 << RSTMGR_PERMODRST_EMAC0_LSB);
+#elif (CONFIG_EMAC_BASE == SOCFPGA_EMAC1_ADDRESS)
+		clrbits_le32(reset, 1 << RSTMGR_PERMODRST_EMAC1_LSB);
+#else
+#error "Incorrect CONFIG_EMAC_BASE value!"
+#endif
+	}
+}
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h
index e004343..9d22576 100644
--- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
@@ -10,6 +10,8 @@ 
 void reset_cpu(ulong addr);
 void reset_deassert_peripherals_handoff(void);
 
+void socfpga_emac_reset(int enable);
+
 void watchdog_disable(void);
 
 struct socfpga_reset_manager {