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[U-Boot,v2,36/40] ARM: tegra: Enable non-cached memory

Message ID 1409067268-956-37-git-send-email-thierry.reding@gmail.com
State Superseded
Delegated to: Tom Warren
Headers show

Commit Message

Thierry Reding Aug. 26, 2014, 3:34 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Some boards, most notably those with a PCIe ethernet NIC, require this
to avoid cache coherency problems. Since the option adds very little
code and overhead enable it across all Tegra generations. Other drivers
may also start supporting this functionality at some point, so enabling
it now will automatically reap the benefits later on.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 include/configs/tegra-common.h | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 717cd61bd69a..16f45f5def9b 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -41,6 +41,7 @@ 
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		(4 << 20)	/* 4MB  */
+#define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)	/* 1 MiB */
 
 /*
  * NS16550 Configuration