diff mbox

[U-Boot,v7,1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox

Message ID 1408984457-10272-1-git-send-email-fabio.estevam@freescale.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Fabio Estevam Aug. 25, 2014, 4:34 p.m. UTC 
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.

Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers, 
which addresses the needs from mx6solox and also works for the other SoCs.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v6:
- Only use FEC_DMA_RX_MINALIGN for the RX buffers
Changes since v5:
- Add Stefan's Ack
Changes since v4:
- None

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 drivers/net/fec_mxc.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

Comments

Marek Vasut Aug. 25, 2014, 7:51 p.m. UTC | #1 
On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> Other SoCs work with the standard 32 bytes alignment.
> 
> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> which addresses the needs from mx6solox and also works for the other SoCs.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Acked-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut
Fabio Estevam Aug. 30, 2014, 5:22 p.m. UTC | #2 
Tom, Joe or Stefano,

On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut <marex@denx.de> wrote:
> On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
>> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
>> Other SoCs work with the standard 32 bytes alignment.
>>
>> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
>> which addresses the needs from mx6solox and also works for the other SoCs.
>>
>> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
>
> Acked-by: Marek Vasut <marex@denx.de>

Could this one be applied for 2014.10-rc?

Thanks
Tom Rini Aug. 30, 2014, 7:21 p.m. UTC | #3 
On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
> Tom, Joe or Stefano,
> 
> On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut <marex@denx.de> wrote:
> > On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
> >> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> >> Other SoCs work with the standard 32 bytes alignment.
> >>
> >> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> >> which addresses the needs from mx6solox and also works for the other SoCs.
> >>
> >> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> >
> > Acked-by: Marek Vasut <marex@denx.de>
> 
> Could this one be applied for 2014.10-rc?

I'd like this via the imx tree.
Fabio Estevam Sept. 3, 2014, 10:21 p.m. UTC | #4 
Hi Stefano,

On Mon, Aug 25, 2014 at 1:34 PM, Fabio Estevam
<fabio.estevam@freescale.com> wrote:
> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> Other SoCs work with the standard 32 bytes alignment.
>
> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> which addresses the needs from mx6solox and also works for the other SoCs.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Could we have this series applied for 2014.10-rc ?
Fabio Estevam Sept. 8, 2014, 11:52 p.m. UTC | #5 
Hi Tom,

On Sat, Aug 30, 2014 at 4:21 PM, Tom Rini <trini@ti.com> wrote:
> On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
>> Tom, Joe or Stefano,
>>
>> On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut <marex@denx.de> wrote:
>> > On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
>> >> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
>> >> Other SoCs work with the standard 32 bytes alignment.
>> >>
>> >> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
>> >> which addresses the needs from mx6solox and also works for the other SoCs.
>> >>
>> >> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
>> >
>> > Acked-by: Marek Vasut <marex@denx.de>
>>
>> Could this one be applied for 2014.10-rc?
>
> I'd like this via the imx tree.

Unfortunately, I am not getting any response from Stefano for quite some time.

Can you apply this series as we are already in rc2 now?
Stefano Babic Sept. 9, 2014, 1:09 p.m. UTC | #6 
Hi Fabio,

On 09/09/2014 01:52, Fabio Estevam wrote:
> Hi Tom,
> 
> On Sat, Aug 30, 2014 at 4:21 PM, Tom Rini <trini@ti.com> wrote:
>> On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
>>> Tom, Joe or Stefano,
>>>
>>> On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut <marex@denx.de> wrote:
>>>> On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
>>>>> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
>>>>> Other SoCs work with the standard 32 bytes alignment.
>>>>>
>>>>> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
>>>>> which addresses the needs from mx6solox and also works for the other SoCs.
>>>>>
>>>>> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
>>>>
>>>> Acked-by: Marek Vasut <marex@denx.de>
>>>
>>> Could this one be applied for 2014.10-rc?
>>
>> I'd like this via the imx tree.
> 
> Unfortunately, I am not getting any response from Stefano for quite some time.
> 

Sorry, I was not in office in last two weeks.

> Can you apply this series as we are already in rc2 now?

Applied to u-boot-imx, thanks !

Fabio, I will try to dig in all patches that queue in last two weeks. If
you can, please take a look next week what is still missing and send me
a remind - thanks !

Best regards,
Stefano Babic
Fabio Estevam Sept. 9, 2014, 1:37 p.m. UTC | #7 
Hi Stefano,

On Tue, Sep 9, 2014 at 10:09 AM, Stefano Babic <sbabic@denx.de> wrote:

> Fabio, I will try to dig in all patches that queue in last two weeks. If
> you can, please take a look next week what is still missing and send me
> a remind - thanks !

Excellent, thanks!
diff mbox

Patch

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 4cefda4..d310016 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -28,6 +28,14 @@  DECLARE_GLOBAL_DATA_PTR;
  */
 #define FEC_XFER_TIMEOUT	5000
 
+/*
+ * The standard 32-byte DMA alignment does not work on mx6solox, which requires
+ * 64-byte alignment in the DMA RX FEC buffer.
+ * Introduce the FEC_DMA_RX_MINALIGN which can cover mx6solox needs and also
+ * satisfies the alignment on other SoCs (32-bytes)
+ */
+#define FEC_DMA_RX_MINALIGN	64
+
 #ifndef CONFIG_MII
 #error "CONFIG_MII has to be defined!"
 #endif
@@ -881,9 +889,9 @@  static int fec_alloc_descs(struct fec_priv *fec)
 	/* Allocate RX buffers. */
 
 	/* Maximum RX buffer size. */
-	size = roundup(FEC_MAX_PKT_SIZE, ARCH_DMA_MINALIGN);
+	size = roundup(FEC_MAX_PKT_SIZE, FEC_DMA_RX_MINALIGN);
 	for (i = 0; i < FEC_RBD_NUM; i++) {
-		data = memalign(ARCH_DMA_MINALIGN, size);
+		data = memalign(FEC_DMA_RX_MINALIGN, size);
 		if (!data) {
 			printf("%s: error allocating rxbuf %d\n", __func__, i);
 			goto err_ring;