Message ID | 1408346196-30419-20-git-send-email-thierry.reding@gmail.com |
---|---|
State | Superseded |
Headers | show |
> + /* TPS659110: LDO2_REG = 1.05V, ACTIVE */ > + data[0] = 0x15; > + addr = 0x31; > + > + err = i2c_read(PMU_I2C_ADDRESS, addr, 1, data, 1); You sure about that read? Me wondering why it did not work on my shiny Apalis T30. > + if (err) { > + debug("failed to set AVDD supply\n"); > + return err; > + } Yeah, that one just did not wana set anything (;-p).
On Tue, Aug 19, 2014 at 01:48:55PM +0000, Marcel Ziswiler wrote: > > + /* TPS659110: LDO2_REG = 1.05V, ACTIVE */ > > + data[0] = 0x15; > > + addr = 0x31; > > + > > + err = i2c_read(PMU_I2C_ADDRESS, addr, 1, data, 1); > > You sure about that read? > > Me wondering why it did not work on my shiny Apalis T30. > > > + if (err) { > > + debug("failed to set AVDD supply\n"); > > + return err; > > + } > > Yeah, that one just did not wana set anything (;-p). Hehe... this should probably be i2c_write() instead. Perhaps this is on by default on Beaver and Cardhu but not on the particular revision that Apalis T30 uses? Can you test whether things start working if you turn that into a write instead? Thierry
On Wed, 2014-08-20 at 08:38 +0200, Thierry Reding wrote: > Hehe... this should probably be i2c_write() instead. Perhaps this is on > by default on Beaver and Cardhu but not on the particular revision that > Apalis T30 uses? Well, we anyway use a completely different rail configuration but me just copy-pasting your read and only changing register addresses resp. values happens to just not wana be working (;-p). > Can you test whether things start working if you turn that into a write > instead? Sure, already did and it works like a beauty! You're the man! U-Boot SPL 2014.10-rc1-00110-gff50ce9-dirty (Aug 20 2014 - 10:14:49) U-Boot 2014.10-rc1-00110-gff50ce9-dirty (Aug 20 2014 - 10:14:49) TEGRA30 Board: Toradex Apalis T30 I2C: ready DRAM: 1 GiB MMC: Tegra SD/MMC: 0, Tegra SD/MMC: 1, Tegra SD/MMC: 2 *** Warning - bad CRC, using default environment tegra-pcie: PCI regions: tegra-pcie: I/O: 0x2000000-0x2010000 tegra-pcie: non-prefetchable memory: 0x20000000-0x30000000 tegra-pcie: prefetchable memory: 0x30000000-0x40000000 tegra-pcie: 4x1, 1x2 configuration tegra-pcie: probing port 0, using 4 lanes tegra-pcie: link 0 down, retrying tegra-pcie: link 0 down, retrying tegra-pcie: link 0 down, retrying tegra-pcie: link 0 down, ignoring tegra-pcie: probing port 1, using 1 lanes tegra-pcie: probing port 2, using 1 lanes In: serial Out: serial Err: serial Net: PCI device RTL8169#0: unknown chip version, assuming RTL-8169 PCI device: TxConfig = 0x3F4000C0 RTL8169#0 Warning: RTL8169#0 using MAC address from net device Hit any key to stop autoboot: 0 Apalis T30 # dhcp BOOTP broadcast 1 DHCP client bound to address 192.168.10.5 Using RTL8169#0 device TFTP from server 192.168.10.1; our IP address is 192.168.10.5 Filename 'uImage-apalis_t30'. Load address: 0x80408000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# #################################################### 3.9 MiB/s done Bytes transferred = 4569784 (45bab8 hex) Apalis T30 #
On Wed, Aug 20, 2014 at 10:56:58AM +0200, Marcel Ziswiler wrote: > On Wed, 2014-08-20 at 08:38 +0200, Thierry Reding wrote: > > Hehe... this should probably be i2c_write() instead. Perhaps this is on > > by default on Beaver and Cardhu but not on the particular revision that > > Apalis T30 uses? > > Well, we anyway use a completely different rail configuration but me > just copy-pasting your read and only changing register addresses resp. > values happens to just not wana be working (;-p). > > > Can you test whether things start working if you turn that into a write > > instead? > > Sure, already did and it works like a beauty! You're the man! Pretty cool. > U-Boot SPL 2014.10-rc1-00110-gff50ce9-dirty (Aug 20 2014 - 10:14:49) > > > U-Boot 2014.10-rc1-00110-gff50ce9-dirty (Aug 20 2014 - 10:14:49) > > TEGRA30 > Board: Toradex Apalis T30 > I2C: ready > DRAM: 1 GiB > MMC: Tegra SD/MMC: 0, Tegra SD/MMC: 1, Tegra SD/MMC: 2 > *** Warning - bad CRC, using default environment > > tegra-pcie: PCI regions: > tegra-pcie: I/O: 0x2000000-0x2010000 > tegra-pcie: non-prefetchable memory: 0x20000000-0x30000000 > tegra-pcie: prefetchable memory: 0x30000000-0x40000000 > tegra-pcie: 4x1, 1x2 configuration > tegra-pcie: probing port 0, using 4 lanes > tegra-pcie: link 0 down, retrying > tegra-pcie: link 0 down, retrying > tegra-pcie: link 0 down, retrying > tegra-pcie: link 0 down, ignoring > tegra-pcie: probing port 1, using 1 lanes > tegra-pcie: probing port 2, using 1 lanes > In: serial > Out: serial > Err: serial > Net: PCI device RTL8169#0: unknown chip version, assuming RTL-8169 > PCI device: TxConfig = 0x3F4000C0 > RTL8169#0 > Warning: RTL8169#0 using MAC address from net device > > Hit any key to stop autoboot: 0 > Apalis T30 # dhcp > BOOTP broadcast 1 > DHCP client bound to address 192.168.10.5 > Using RTL8169#0 device > TFTP from server 192.168.10.1; our IP address is 192.168.10.5 > Filename 'uImage-apalis_t30'. > Load address: 0x80408000 > Loading: > ################################################################# > > ################################################################# > > ################################################################# > > ################################################################# > #################################################### > 3.9 MiB/s > done > Bytes transferred = 4569784 (45bab8 hex) > Apalis T30 # Wow, 3.9 MiB/s on average. I only get around 2.0 MiB/s on all my devices. TrimSlice is the exception with around 5.0 MiB/s. I wonder where exactly that comes from. It's the oldest device so I'd expect it to be the slowest too. Thierry
On Wed, 2014-08-20 at 11:46 +0200, Thierry Reding wrote: > Wow, 3.9 MiB/s on average. I only get around 2.0 MiB/s on all my > devices. TrimSlice is the exception with around 5.0 MiB/s. I wonder > where exactly that comes from. It's the oldest device so I'd expect > it to be the slowest too. That's now with Marek's i210 patches plus some more fiddling on my side. Not perfect yet but already pretty blazing fast, sorry about that (;-p). BTW: You do have our hw laying around as well don't you. So no need to play with this slow Jetson TK1 stuff any longer (;-p). Apalis T30 # dhcp e1000: e1000#0: ERROR: Hardware Initialization Failed BOOTP broadcast 1 DHCP client bound to address 192.168.10.5 Using e1000#0 device TFTP from server 192.168.10.1; our IP address is 192.168.10.5 Filename 'uImage-apalis_t30'. Load address: 0x80408000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# #################################################### 7.3 MiB/s done Bytes transferred = 4569784 (45bab8 hex)
On 08/18/2014 01:16 AM, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > The Beaver has an ethernet NIC connected to the PCIe bus. Enable the > PCIe controller and the network device driver so that the device can > boot over the network. > > In addition the board has a mini-PCIe expansion slot. > diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts > + pcie-controller { > + status = "okay"; > + pex-clk-supply = <&sys_3v3_pexs_reg>; > + vdd-supply = <&ldo1_reg>; > + avdd-supply = <&ldo2_reg>; Just like TrimSlice, there are more regulator references in the kernel DT. The same comment applies to the next patch (i.e. the Cardhu DT patch) > + regulators { ... > + vdd_5v_in_reg: regulator@0 { ... > + sys_3v3_reg: regulator@6 { ... > + sys_3v3_pexs_reg: regulator@7 { This only adds 3 of the regulators that are in the kernel DT. Can we just add the whole regulators node so the two are consistent? > diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c The commit description says Beaver... I guess this should be part of the next patch, and the two swapped?
On Wed, Aug 20, 2014 at 12:43:58PM -0600, Stephen Warren wrote: > On 08/18/2014 01:16 AM, Thierry Reding wrote: > >From: Thierry Reding <treding@nvidia.com> > > > >The Beaver has an ethernet NIC connected to the PCIe bus. Enable the > >PCIe controller and the network device driver so that the device can > >boot over the network. > > > >In addition the board has a mini-PCIe expansion slot. > > >diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts > > >+ pcie-controller { > >+ status = "okay"; > >+ pex-clk-supply = <&sys_3v3_pexs_reg>; > >+ vdd-supply = <&ldo1_reg>; > >+ avdd-supply = <&ldo2_reg>; > > Just like TrimSlice, there are more regulator references in the kernel DT. > > The same comment applies to the next patch (i.e. the Cardhu DT patch) Done. I also added the unit address to the PCIe controller node name for consistency. > >+ regulators { > ... > >+ vdd_5v_in_reg: regulator@0 { > ... > >+ sys_3v3_reg: regulator@6 { > ... > >+ sys_3v3_pexs_reg: regulator@7 { > > This only adds 3 of the regulators that are in the kernel DT. Can we just > add the whole regulators node so the two are consistent? Done. > >diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c > > The commit description says Beaver... > > I guess this should be part of the next patch, and the two swapped? Done. Thanks, Thierry
diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts index 85e62e9db32e..e113801fdfb4 100644 --- a/arch/arm/dts/tegra30-beaver.dts +++ b/arch/arm/dts/tegra30-beaver.dts @@ -23,6 +23,27 @@ reg = <0x80000000 0x7ff00000>; }; + pcie-controller { + status = "okay"; + pex-clk-supply = <&sys_3v3_pexs_reg>; + vdd-supply = <&ldo1_reg>; + avdd-supply = <&ldo2_reg>; + + pci@1,0 { + status = "okay"; + nvidia,num-lanes = <2>; + }; + + pci@2,0 { + nvidia,num-lanes = <2>; + }; + + pci@3,0 { + status = "okay"; + nvidia,num-lanes = <2>; + }; + }; + i2c@7000c000 { status = "okay"; clock-frequency = <100000>; @@ -46,6 +67,110 @@ i2c@7000d000 { status = "okay"; clock-frequency = <100000>; + + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + vcc1-supply = <&vdd_5v_in_reg>; + vcc2-supply = <&vdd_5v_in_reg>; + vcc3-supply = <&vio_reg>; + vcc4-supply = <&vdd_5v_in_reg>; + vcc5-supply = <&vdd_5v_in_reg>; + vcc6-supply = <&vdd2_reg>; + vcc7-supply = <&vdd_5v_in_reg>; + vccio-supply = <&vdd_5v_in_reg>; + + regulators { + #address-cells = <1>; + #size-cells = <0>; + + vdd1_reg: vdd1 { + regulator-name = "vddio_ddr_1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vdd2_reg: vdd2 { + regulator-name = "vdd_1v5_gen"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + vddctrl_reg: vddctrl { + regulator-name = "vdd_cpu,vdd_sys"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + vio_reg: vio { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "vdd_pexa,vdd_pexb"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + ldo2_reg: ldo2 { + regulator-name = "vdd_sata,avdd_plle"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + /* LDO3 is not connected to anything */ + + ldo4_reg: ldo4 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "vddio_sdmmc,avdd_vdac"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "avdd_dsi_csi,pwrdet_mipi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo7_reg: ldo7 { + regulator-name = "vdd_pllm,x,u,a_p_c_s"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "vdd_ddr_hs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + }; + }; }; spi@7000da00 { @@ -81,4 +206,45 @@ nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */ status = "okay"; }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vdd_5v_in_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "vdd_5v_in"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + sys_3v3_reg: regulator@6 { + compatible = "regulator-fixed"; + reg = <6>; + regulator-name = "sys_3v3,vdd_3v3_alw"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; + vin-supply = <&vdd_5v_in_reg>; + }; + + sys_3v3_pexs_reg: regulator@7 { + compatible = "regulator-fixed"; + reg = <7>; + regulator-name = "sys_3v3_pexs"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>; + vin-supply = <&sys_3v3_reg>; + }; + }; }; diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c index cc0e5e130fda..5738dd1f5195 100644 --- a/board/nvidia/cardhu/cardhu.c +++ b/board/nvidia/cardhu/cardhu.c @@ -8,8 +8,11 @@ #include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/gp_padctrl.h> +#include <asm/arch/gpio.h> +#include <asm/gpio.h> #include "pinmux-config-cardhu.h" #include <i2c.h> +#include <netdev.h> #define PMU_I2C_ADDRESS 0x2D #define MAX_I2C_RETRY 3 @@ -76,3 +79,56 @@ void pin_mux_mmc(void) board_sdmmc_voltage_init(); } #endif /* MMC */ + +#ifdef CONFIG_PCI_TEGRA +int tegra_pcie_board_init(void) +{ + unsigned int old_bus; + u8 addr, data[1]; + int err; + + old_bus = i2c_get_bus_num(); + + err = i2c_set_bus_num(0); + if (err) { + debug("failed to set I2C bus\n"); + return err; + } + + /* TPS659110: LDO1_REG = 1.05V, ACTIVE */ + data[0] = 0x15; + addr = 0x30; + + err = i2c_write(PMU_I2C_ADDRESS, addr, 1, data, 1); + if (err) { + debug("failed to set VDD supply\n"); + return err; + } + + /* GPIO: PEX = 3.3V */ + err = gpio_request(GPIO_PL7, "PEX"); + if (err < 0) + return err; + + gpio_direction_output(GPIO_PL7, 1); + + /* TPS659110: LDO2_REG = 1.05V, ACTIVE */ + data[0] = 0x15; + addr = 0x31; + + err = i2c_read(PMU_I2C_ADDRESS, addr, 1, data, 1); + if (err) { + debug("failed to set AVDD supply\n"); + return err; + } + + i2c_set_bus_num(old_bus); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} +#endif /* PCI */ diff --git a/include/configs/beaver.h b/include/configs/beaver.h index ae831127985f..bc96f6438d3c 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -84,6 +84,16 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +/* PCI host support */ +#define CONFIG_PCI +#define CONFIG_PCI_TEGRA +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PCI_ENUM + +/* PCI networking support */ +#define CONFIG_RTL8169 + /* General networking support */ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP