| Message ID | 1398561270-25091-6-git-send-email-danindrey@mail.ru |
|---|---|
| State | Deferred |
| Delegated to: | Tom Warren |
| Headers | show |
On 04/26/2014 07:14 PM, Andrey Danin wrote: This patch isn't adding DT bindings for NVEC, but rather add DT nodes. The binding is the schema, not the content. We need a DT binding document that's been reviewed by the DT binding maintainers. Can you please first submit a patch to the Linux kernel that modifies the existing I2C core and Tegra I2C controller binding documentation to add slave mode support. Once that's fully reviewed and ack'd, this patch series can implement support for it in U-Boot. > diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts > i2c@7000c500 { > - status = "disabled"; > + status = "okay"; > + clock-frequency = <40000>; > + slave-addr = <138>; > + nvec { > + compatible = "nvidia,tegra20-nvec"; > + request-gpios = <&gpio 170 0>; /* gpio PV2 */ The reg property is missing here. Since the i2c node has #address-cells/#size-cells, there must be a reg property in the children. There's nothing here to indicate that this node is a slave device rather than a master device, and doesn't seem to be any allowance for a single I2C controller to support both master and slave nodes at the same time (which I think Tegra's controller can IIRC). IIRC, I had previously suggested something like encoding master/slave into the reg property of the I2C child nodes. We could either do: a) Set some top-bit to indicate a slave device. b) If #address-cells=<1>, only master devices are present. If #address-cells=<2>, either master or slave devices could be present. Cell 0 could be 0==master, 1==slave, and cell 1 the actual I2C bus address. Either of those approaches would allow representing an I2C controller that supported multiple slave addresses. Even though I think Tegra's slave controller doesn't support that, I still think we should use a generic binding so that I2C slave mode looks the same everywhere.
Hi, Am Montag, 28. April 2014, 17:04:13 schrieb Stephen Warren: > On 04/26/2014 07:14 PM, Andrey Danin wrote: > > This patch isn't adding DT bindings for NVEC, but rather add DT nodes. > The binding is the schema, not the content. > > We need a DT binding document that's been reviewed by the DT binding > maintainers. Can you please first submit a patch to the Linux kernel > that modifies the existing I2C core and Tegra I2C controller binding > documentation to add slave mode support. Once that's fully reviewed and > ack'd, this patch series can implement support for it in U-Boot. I'm sorry that I didn't came up with a proper kernel implementation, but while we are discussion the binding I just want to give some coins. > > diff --git a/arch/arm/dts/tegra20-paz00.dts > > b/arch/arm/dts/tegra20-paz00.dts> > > i2c@7000c500 { > > > > - status = "disabled"; > > + status = "okay"; > > + clock-frequency = <40000>; > > + slave-addr = <138>; > > + nvec { > > + compatible = "nvidia,tegra20-nvec"; > > + request-gpios = <&gpio 170 0>; /* gpio PV2 */ > > The reg property is missing here. Since the i2c node has > #address-cells/#size-cells, there must be a reg property in the children. > > There's nothing here to indicate that this node is a slave device rather > than a master device, and doesn't seem to be any allowance for a single > I2C controller to support both master and slave nodes at the same time > (which I think Tegra's controller can IIRC). > > IIRC, I had previously suggested something like encoding master/slave > into the reg property of the I2C child nodes. We could either do: > > a) Set some top-bit to indicate a slave device. > > b) If #address-cells=<1>, only master devices are present. If > #address-cells=<2>, either master or slave devices could be present. > Cell 0 could be 0==master, 1==slave, and cell 1 the actual I2C bus address. I'm not sure if this is really needed. NVEC knows it has to configure the tegra controller as slave. I don't see a reason to double this fact in the device tree. I like the idea of how the downstream kernel does it. The driver calls something like tegra_i2c_init_slave with the slave address as an parameter. This means that the slave address is not a property of the i2c (slave-) controller, but of the master because it has the address hard coded in its firmware. So reg = <138>; would be sufficient here and it also enables multi-slave configs. i2c-tegra must take care that only one transaction (slave or master) is running at a time. The client (e.g. nvec) is free to drop the excluse usage by calling tegra_i2c_stop_slave so master mode can be used again or another client (master device) can be started where the slave controller gets a different address. Multi-master would require that only one master can hold the lock enabling slave mode, but that's all software stuff and not related to the binding. Also the kernel binding would require that nvec node itself has subdevices for e.g. keyboard, mouse, power, ... which are connected to the internal ec bus. We can use the nvec protocol identifiers to assign an address here. Ok, lets take a look at the binding now: i2c@7000c500 { status = "okay"; clock-frequency = <40000>; nvec@138 { compatible = "nvidia,nvec, simple-bus"; #address-cells = <1> #size-cells = <0>; reg = <138>; request-gpios = <&gpio 170 0>; /* gpio PV2 */ keyboard@5 { compatible = "nvidia,nvec-kbd"; reg = <5>; }; mouse@6 { compatible = "nvidia,nvec-aux"; reg = <6>; packet-size = <6>; }; }; }; Only thing I'm not sure is where to put the clock-frequency because it really depends on the i2c clients and if we have multiple masters, we could use multiple frequencies. Or maybe the lowest supported must be used instead, in which case the clock-frequency is better placed in the controller node. Marc
On 04/30/2014 01:52 AM, Marc Dietrich wrote: > Hi, > > Am Montag, 28. April 2014, 17:04:13 schrieb Stephen Warren: >> On 04/26/2014 07:14 PM, Andrey Danin wrote: >> >> This patch isn't adding DT bindings for NVEC, but rather add DT nodes. >> The binding is the schema, not the content. >> >> We need a DT binding document that's been reviewed by the DT binding >> maintainers. Can you please first submit a patch to the Linux kernel >> that modifies the existing I2C core and Tegra I2C controller binding >> documentation to add slave mode support. Once that's fully reviewed and >> ack'd, this patch series can implement support for it in U-Boot. > > I'm sorry that I didn't came up with a proper kernel implementation, but while > we are discussion the binding I just want to give some coins. I'm not looking for a kernel driver implementation, but we do need to the DT binding fully reviewed and accepted. >>> diff --git a/arch/arm/dts/tegra20-paz00.dts >>> b/arch/arm/dts/tegra20-paz00.dts> >>> i2c@7000c500 { >>> >>> - status = "disabled"; >>> + status = "okay"; >>> + clock-frequency = <40000>; >>> + slave-addr = <138>; >>> + nvec { >>> + compatible = "nvidia,tegra20-nvec"; >>> + request-gpios = <&gpio 170 0>; /* gpio PV2 */ >> >> The reg property is missing here. Since the i2c node has >> #address-cells/#size-cells, there must be a reg property in the children. >> >> There's nothing here to indicate that this node is a slave device rather >> than a master device, and doesn't seem to be any allowance for a single >> I2C controller to support both master and slave nodes at the same time >> (which I think Tegra's controller can IIRC). >> >> IIRC, I had previously suggested something like encoding master/slave >> into the reg property of the I2C child nodes. We could either do: >> >> a) Set some top-bit to indicate a slave device. >> >> b) If #address-cells=<1>, only master devices are present. If >> #address-cells=<2>, either master or slave devices could be present. >> Cell 0 could be 0==master, 1==slave, and cell 1 the actual I2C bus address. > > I'm not sure if this is really needed. NVEC knows it has to configure the > tegra controller as slave. I don't see a reason to double this fact in the > device tree. I like the idea of how the downstream kernel does it. The driver > calls something like tegra_i2c_init_slave with the slave address as an > parameter. This means that the slave address is not a property of the i2c > (slave-) controller, but of the master because it has the address hard coded > in its firmware. So reg = <138>; would be sufficient here and it also enables > multi-slave configs. The binding in this patch is very special-cased. Instead, we need to create a generic binding that will work identically across arbitrary I2C controllers, some of which do support multiple slave addresses. The issue that caused Linus to blow up about ARM was because everyone went off and did their own HW-specific stuff without taking a look at the big picture. That's exactly what the binding proposed in this patch does too.
On Wed, 30 Apr 2014 10:21:07 -0600 Stephen Warren <swarren@wwwdotorg.org> wrote: > On 04/30/2014 01:52 AM, Marc Dietrich wrote: > > Am Montag, 28. April 2014, 17:04:13 schrieb Stephen Warren: > >> On 04/26/2014 07:14 PM, Andrey Danin wrote: > >> > >> This patch isn't adding DT bindings for NVEC, but rather add DT nodes. > >> The binding is the schema, not the content. > >> > >> We need a DT binding document that's been reviewed by the DT binding > >> maintainers. Can you please first submit a patch to the Linux kernel > >> that modifies the existing I2C core and Tegra I2C controller binding > >> documentation to add slave mode support. Once that's fully reviewed and > >> ack'd, this patch series can implement support for it in U-Boot. > > > > I'm sorry that I didn't came up with a proper kernel implementation, but while > > we are discussion the binding I just want to give some coins. > > I'm not looking for a kernel driver implementation, but we do need to > the DT binding fully reviewed and accepted. well, a kernel implementation would have included the binding. > >>> diff --git a/arch/arm/dts/tegra20-paz00.dts > >>> b/arch/arm/dts/tegra20-paz00.dts> > >>> i2c@7000c500 { > >>> > >>> - status = "disabled"; > >>> + status = "okay"; > >>> + clock-frequency = <40000>; > >>> + slave-addr = <138>; > >>> + nvec { > >>> + compatible = "nvidia,tegra20-nvec"; > >>> + request-gpios = <&gpio 170 0>; /* gpio PV2 */ > >> > >> The reg property is missing here. Since the i2c node has > >> #address-cells/#size-cells, there must be a reg property in the children. > >> > >> There's nothing here to indicate that this node is a slave device rather > >> than a master device, and doesn't seem to be any allowance for a single > >> I2C controller to support both master and slave nodes at the same time > >> (which I think Tegra's controller can IIRC). > >> > >> IIRC, I had previously suggested something like encoding master/slave > >> into the reg property of the I2C child nodes. We could either do: > >> > >> a) Set some top-bit to indicate a slave device. > >> > >> b) If #address-cells=<1>, only master devices are present. If > >> #address-cells=<2>, either master or slave devices could be present. > >> Cell 0 could be 0==master, 1==slave, and cell 1 the actual I2C bus address. > > > > I'm not sure if this is really needed. NVEC knows it has to configure the > > tegra controller as slave. I don't see a reason to double this fact in the > > device tree. I like the idea of how the downstream kernel does it. The driver > > calls something like tegra_i2c_init_slave with the slave address as an > > parameter. This means that the slave address is not a property of the i2c > > (slave-) controller, but of the master because it has the address hard coded > > in its firmware. So reg = <138>; would be sufficient here and it also enables > > multi-slave configs. > > The binding in this patch is very special-cased. Instead, we need to > create a generic binding that will work identically across arbitrary I2C > controllers, some of which do support multiple slave addresses. I don't see why multi-slave capable controllers won't work. You just increase the number in the controller's address-cells and add the slave addresses to the master's reg property. The point here is that the slave addresses of an i2c controller may be configured at runtime, not at device initialization via devicetree. This also gives a higher flexibility for different slave/master combinations. > The issue that caused Linus to blow up about ARM was because everyone went > off and did their own HW-specific stuff without taking a look at the big > picture. That's exactly what the binding proposed in this patch does too. I can only assume that your are slowly getting tired of this binding discussion. Still there is no reason for harsh words or to delete my proposal from the context. IMHO, I tried to be as generic as possible. Anyway, we should move this discussion to the devicetree ml. Marc
diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts index 780203c..9906f3a 100644 --- a/arch/arm/dts/tegra20-paz00.dts +++ b/arch/arm/dts/tegra20-paz00.dts @@ -40,7 +40,13 @@ }; i2c@7000c500 { - status = "disabled"; + status = "okay"; + clock-frequency = <40000>; + slave-addr = <138>; + nvec { + compatible = "nvidia,tegra20-nvec"; + request-gpios = <&gpio 170 0>; /* gpio PV2 */ + }; }; i2c@7000d000 {
Signed-off-by: Andrey Danin <danindrey@mail.ru> CC: Stephen Warren <swarren@nvidia.com> CC: Marc Dietrich <marvin24@gmx.de> CC: Julian Andres Klode <jak@jak-linux.org> CC: devicetree@vger.kernel.org CC: ac100@lists.launchpad.net --- Changes for v2: - Separated from enabling keyboard patch - Changed NVEC dt bindings arch/arm/dts/tegra20-paz00.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)