diff mbox

[for-2.0,v1,1/1] timer: cadence_ttc: Fix match register write logic

Message ID 74147b4c017c904364955cc73107f90e6ac8ba74.1396326389.git.peter.crosthwaite@xilinx.com
State New
Headers show

Commit Message

Peter Crosthwaite April 1, 2014, 4:31 a.m. UTC 
This switch logic should not fall through. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
Spotted by Coverity (via PMM)

 hw/timer/cadence_ttc.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Peter Maydell April 1, 2014, 5:12 p.m. UTC | #1 
On 1 April 2014 05:31, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote:
> This switch logic should not fall through. Fix.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> ---
> Spotted by Coverity (via PMM)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

I'm not planning to put this into 2.0 at this stage,
unless you think it's important to do so.

thanks
-- PMM
diff mbox

Patch

diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c
index a279bce..28cb328 100644
--- a/hw/timer/cadence_ttc.c
+++ b/hw/timer/cadence_ttc.c
@@ -346,11 +346,13 @@  static void cadence_ttc_write(void *opaque, hwaddr offset,
     case 0x34:
     case 0x38:
         s->reg_match[0] = value & 0xffff;
+        break;
 
     case 0x3c: /* match register */
     case 0x40:
     case 0x44:
         s->reg_match[1] = value & 0xffff;
+        break;
 
     case 0x48: /* match register */
     case 0x4c: