diff mbox

[U-Boot,v2] zynq: Update CLK in bdinfo

Message ID 743eb2fc7294a31589a3b03455cef83445a05e0c.1391584710.git.michal.simek@xilinx.com
State Accepted
Delegated to: Michal Simek
Headers show

Commit Message

Michal Simek Feb. 5, 2014, 7:18 a.m. UTC
ARM has specific clk entries which should be also setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

Changes in v2:
- Freq is expected to be in MHz
- Use different DDR clock input

 arch/arm/cpu/armv7/zynq/clk.c | 5 +++++
 1 file changed, 5 insertions(+)

--
1.8.2.3

Comments

Albert ARIBAUD Feb. 13, 2014, 2:52 p.m. UTC | #1
Hi Michal,

On Wed,  5 Feb 2014 08:18:35 +0100, Michal Simek
<michal.simek@xilinx.com> wrote:

> ARM has specific clk entries which should be also setup.
> 
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
> 
> Changes in v2:
> - Freq is expected to be in MHz
> - Use different DDR clock input
> 
>  arch/arm/cpu/armv7/zynq/clk.c | 5 +++++
>  1 file changed, 5 insertions(+)

This is assigned to me, but it seems to be V2 of
http://patchwork.ozlabs.org/patch/313199/ which was assigned to you.
Should I apply this in ARM as a standalone patch?

Amicalement,
Michal Simek Feb. 13, 2014, 3:21 p.m. UTC | #2
On 02/13/2014 03:52 PM, Albert ARIBAUD wrote:
> Hi Michal,
> 
> On Wed,  5 Feb 2014 08:18:35 +0100, Michal Simek
> <michal.simek@xilinx.com> wrote:
> 
>> ARM has specific clk entries which should be also setup.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
>> Changes in v2:
>> - Freq is expected to be in MHz
>> - Use different DDR clock input
>>
>>  arch/arm/cpu/armv7/zynq/clk.c | 5 +++++
>>  1 file changed, 5 insertions(+)
> 
> This is assigned to me, but it seems to be V2 of
> http://patchwork.ozlabs.org/patch/313199/ which was assigned to you.
> Should I apply this in ARM as a standalone patch?


no. I will be/is the part of my zynq pull request.

Thanks,
Michal
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/zynq/clk.c b/arch/arm/cpu/armv7/zynq/clk.c
index 4307111..d2885dc 100644
--- a/arch/arm/cpu/armv7/zynq/clk.c
+++ b/arch/arm/cpu/armv7/zynq/clk.c
@@ -161,6 +161,8 @@  static void init_ddr_clocks(void)
 	clks[dci_clk].frequency = DIV_ROUND_CLOSEST(
 			DIV_ROUND_CLOSEST(prate, div0), div1);
 	clks[dci_clk].name = "dci";
+
+	gd->bd->bi_ddr_freq = clks[ddr3x_clk].frequency / 1000000;
 }

 static void init_cpu_clocks(void)
@@ -593,6 +595,9 @@  int set_cpu_clk_info(void)
 	init_periph_clocks();
 	init_aper_clocks();

+	gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
+	gd->bd->bi_dsp_freq = 0;
+
 	return 0;
 }