Patchwork [v3] target-arm: fix build with gcc 4.8.2

login
register
mail settings
Submitter Michael S. Tsirkin
Date Dec. 23, 2013, 2:52 p.m.
Message ID <20131223145216.GA22663@redhat.com>
Download mbox | patch
Permalink /patch/304783/
State New
Headers show

Comments

Michael S. Tsirkin - Dec. 23, 2013, 2:52 p.m.
commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3
    "target-arm: A64: add set_pc cpu method"

introduces an array aarch64_cpus which is zero
size if this code is built without CONFIG_USER_ONLY.
In particular an attempt to iterate over this array produces a warning
under gcc 4.8.2:

 CC    aarch64-softmmu/target-arm/cpu64.o
/scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
/scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
expression < 0 is always false [-Werror=type-limits]
     for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
     ^
cc1: all warnings being treated as errors

This is the result of ARRAY_SIZE being an unsigned type,
causing "i" to be promoted to unsigned int as well.

As zero size arrays are a gcc extension, it seems
cleanest to add a dummy element with NULL name,
and test for it during registration.

We'll be able to drop this when we add more CPUs.

Cc: Alexander Graf <agraf@suse.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
changes from v2:
    add more comments
changes from v1:
    add a comment

 target-arm/cpu64.c | 6 ++++++
 1 file changed, 6 insertions(+)
Stefan Weil - Dec. 23, 2013, 2:54 p.m.
Am 23.12.2013 15:52, schrieb Michael S. Tsirkin:
> commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3
>     "target-arm: A64: add set_pc cpu method"
>
> introduces an array aarch64_cpus which is zero
> size if this code is built without CONFIG_USER_ONLY.
> In particular an attempt to iterate over this array produces a warning
> under gcc 4.8.2:
>
>  CC    aarch64-softmmu/target-arm/cpu64.o
> /scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
> /scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
> expression < 0 is always false [-Werror=type-limits]
>      for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
>      ^
> cc1: all warnings being treated as errors
>
> This is the result of ARRAY_SIZE being an unsigned type,
> causing "i" to be promoted to unsigned int as well.
>
> As zero size arrays are a gcc extension, it seems
> cleanest to add a dummy element with NULL name,
> and test for it during registration.
>
> We'll be able to drop this when we add more CPUs.
>
> Cc: Alexander Graf <agraf@suse.de>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Richard Henderson <rth@twiddle.net>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> changes from v2:
>     add more comments
> changes from v1:
>     add a comment
>
>  target-arm/cpu64.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
> index 04ce879..60acd24 100644
> --- a/target-arm/cpu64.c
> +++ b/target-arm/cpu64.c
> @@ -58,6 +58,7 @@ static const ARMCPUInfo aarch64_cpus[] = {
>  #ifdef CONFIG_USER_ONLY
>      { .name = "any",         .initfn = aarch64_any_initfn },
>  #endif
> +    { .name = NULL } /* TODO: drop when we support more CPUs */
>  };
>  
>  static void aarch64_cpu_initfn(Object *obj)
> @@ -100,6 +101,11 @@ static void aarch64_cpu_register(const ARMCPUInfo *info)
>          .class_init = info->class_init,
>      };
>  
> +    /* TODO: drop when we support more CPUs - all entries will have name set */
> +    if (!info->name) {
> +        return;
> +    }
> +
>      type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
>      type_register(&type_info);
>      g_free((void *)type_info.name);

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Peter Maydell - Dec. 23, 2013, 3:03 p.m.
On 23 December 2013 14:52, Michael S. Tsirkin <mst@redhat.com> wrote:
> commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3
>     "target-arm: A64: add set_pc cpu method"
>
> introduces an array aarch64_cpus which is zero
> size if this code is built without CONFIG_USER_ONLY.
> In particular an attempt to iterate over this array produces a warning
> under gcc 4.8.2:
>
>  CC    aarch64-softmmu/target-arm/cpu64.o
> /scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
> /scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
> expression < 0 is always false [-Werror=type-limits]
>      for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
>      ^
> cc1: all warnings being treated as errors
>
> This is the result of ARRAY_SIZE being an unsigned type,
> causing "i" to be promoted to unsigned int as well.
>
> As zero size arrays are a gcc extension, it seems
> cleanest to add a dummy element with NULL name,
> and test for it during registration.
>
> We'll be able to drop this when we add more CPUs.
>
> Cc: Alexander Graf <agraf@suse.de>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Richard Henderson <rth@twiddle.net>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

Patch

diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index 04ce879..60acd24 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -58,6 +58,7 @@  static const ARMCPUInfo aarch64_cpus[] = {
 #ifdef CONFIG_USER_ONLY
     { .name = "any",         .initfn = aarch64_any_initfn },
 #endif
+    { .name = NULL } /* TODO: drop when we support more CPUs */
 };
 
 static void aarch64_cpu_initfn(Object *obj)
@@ -100,6 +101,11 @@  static void aarch64_cpu_register(const ARMCPUInfo *info)
         .class_init = info->class_init,
     };
 
+    /* TODO: drop when we support more CPUs - all entries will have name set */
+    if (!info->name) {
+        return;
+    }
+
     type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
     type_register(&type_info);
     g_free((void *)type_info.name);