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[2/2] powerpc: Enable Little Endian Alignment Handler for Float Pair Instructions

Message ID 1382116102.2206.16.camel@tmusta-sc.rchland.ibm.com (mailing list archive)
State Accepted, archived
Commit 630c8a5fc9fb2f3541652b65f23630757d304cc9
Headers show

Commit Message

Tom Musta Oct. 18, 2013, 5:08 p.m. UTC 
This patch enables alignment handling for the load/store floating point
pair instructions (lfdp, lfdpx, stfdp, stfdpx).  The handler routine
is properly coded and only needs to be enabled.

Signed-off-by: Tom Musta <tmusta@gmail.com>
---
 arch/powerpc/kernel/align.c |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)
diff mbox

Patch

diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index a3169a9..de91f3a 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -378,7 +378,6 @@  static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr,
  * Only POWER6 has these instructions, and it does true little-endian,
  * so we don't need the address swizzling.
  */
-#ifdef __BIG_ENDIAN__
 static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg,
 			   unsigned int flags)
 {
@@ -406,7 +405,6 @@  static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg,
 		return -EFAULT;
 	return 1;	/* exception handled and fixed up */
 }
-#endif
 
 #ifdef CONFIG_SPE
 
@@ -918,12 +916,8 @@  int fix_alignment(struct pt_regs *regs)
 
 	/* Special case for 16-byte FP loads and stores */
 	if (nb == 16) {
-#ifdef __BIG_ENDIAN__
 		PPC_WARN_ALIGNMENT(fp_pair, regs);
 		return emulate_fp_pair(addr, reg, flags);
-#else
-		return -EFAULT;
-#endif
 	}
 
 	PPC_WARN_ALIGNMENT(unaligned, regs);