[2/4] powerpc: Move VSX load/stores into ppc-opcode.h

Cleans up the VSX load/store instructions by moving them into
ppc-opcode.h.

Signed-off-by: Michael Neuling <mikey@neuling.org>
---

 arch/powerpc/include/asm/ppc-opcode.h |   13 +++++++++++++
 arch/powerpc/include/asm/ppc_asm.h    |   10 ----------
 2 files changed, 13 insertions(+), 10 deletions(-)

On Apr 30, 2009, at 1:58 AM, Michael Neuling wrote:

> Cleans up the VSX load/store instructions by moving them into
> ppc-opcode.h.
>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
>

Acked-by: Kumar Gala <galak@kernel.crashing.org>

- k


> arch/powerpc/include/asm/ppc-opcode.h |   13 +++++++++++++
> arch/powerpc/include/asm/ppc_asm.h    |   10 ----------
> 2 files changed, 13 insertions(+), 10 deletions(-)
>
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h
> @@ -25,6 +25,7 @@
> #define PPC_INST_LSWI			0x7c0004aa
> #define PPC_INST_LSWX			0x7c00042a
> #define PPC_INST_LWSYNC			0x7c2004ac
> +#define PPC_INST_LXVD2X			0x7c000698
> #define PPC_INST_MCRXR			0x7c000400
> #define PPC_INST_MCRXR_MASK		0xfc0007fe
> #define PPC_INST_MFSPR_PVR		0x7c1f42a6
> @@ -43,12 +44,14 @@
>
> #define PPC_INST_STSWI			0x7c0005aa
> #define PPC_INST_STSWX			0x7c00052a
> +#define PPC_INST_STXVD2X		0x7c000798
> #define PPC_INST_TLBILX			0x7c000024
> #define PPC_INST_WAIT			0x7c00007c
>
> /* macros to insert fields into opcodes */
> #define __PPC_RA(a)	(((a) & 0x1f) << 16)
> #define __PPC_RB(b)	(((b) & 0x1f) << 11)
> +#define __PPC_XS(s)	((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
> #define __PPC_T_TLB(t)	(((t) & 0x3) << 21)
> #define __PPC_WC(w)	(((w) & 0x3) << 21)
>
> @@ -70,4 +73,14 @@
> #define PPC_WAIT(w)		stringify_in_c(.long PPC_INST_WAIT | \
> 					__PPC_WC(w))
>
> +/*
> + * Define what the VSX XX1 form instructions will look like, then add
> + * the 128 bit load store instructions based on that.
> + */
> +#define VSX_XX1(s, a, b)	(__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
> +#define STXVD2X(s, a, b)	stringify_in_c(.long PPC_INST_STXVD2X | \
> +					       VSX_XX1((s), (a), (b)))
> +#define LXVD2X(s, a, b)		stringify_in_c(.long PPC_INST_LXVD2X | \
> +					       VSX_XX1((s), (a), (b)))
> +
> #endif /* _ASM_POWERPC_PPC_OPCODE_H */
> Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
> ===================================================================
> --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc_asm.h
> +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h
> @@ -76,16 +76,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);				
> 				REST_10GPRS(22, base)
> #endif
>
> -/*
> - * Define what the VSX XX1 form instructions will look like, then add
> - * the 128 bit load store instructions based on that.
> - */
> -#define VSX_XX1(xs, ra, rb)	(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
> -				 ((rb) << 11) | (((xs) >> 5)))
> -
> -#define STXVD2X(xs, ra, rb)	.long (0x7c000798 | VSX_XX1((xs), (ra),  
> (rb)))
> -#define LXVD2X(xs, ra, rb)	.long (0x7c000698 | VSX_XX1((xs), (ra),  
> (rb)))
> -
> #define SAVE_2GPRS(n, base)	SAVE_GPR(n, base); SAVE_GPR(n+1, base)
> #define SAVE_4GPRS(n, base)	SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
> #define SAVE_8GPRS(n, base)	SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)