| Message ID | 1375784612-14399-4-git-send-email-haokexin@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Benjamin Herrenschmidt |
| Headers | show |
On Tue, 2013-08-06 at 18:23 +0800, Kevin Hao wrote: > We don't need to flush the dcache and invalidate the icache on the > CPU which has CPU_FTR_COHERENT_ICACHE set. Actually we probably need an isync... Ben. > Signed-off-by: Kevin Hao <haokexin@gmail.com> > --- > arch/powerpc/kernel/misc_64.S | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S > index a781566..32e78e2 100644 > --- a/arch/powerpc/kernel/misc_64.S > +++ b/arch/powerpc/kernel/misc_64.S > @@ -207,6 +207,9 @@ _GLOBAL(flush_inval_dcache_range) > * void __flush_dcache_icache(void *page) > */ > _GLOBAL(__flush_dcache_icache) > +BEGIN_FTR_SECTION > + blr > +END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) > /* > * Flush the data cache to memory > *
On Tue, Aug 06, 2013 at 08:36:38PM +1000, Benjamin Herrenschmidt wrote: > On Tue, 2013-08-06 at 18:23 +0800, Kevin Hao wrote: > > We don't need to flush the dcache and invalidate the icache on the > > CPU which has CPU_FTR_COHERENT_ICACHE set. > > Actually we probably need an isync... Will add. Thanks, Kevin > > Ben. > > > Signed-off-by: Kevin Hao <haokexin@gmail.com> > > --- > > arch/powerpc/kernel/misc_64.S | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S > > index a781566..32e78e2 100644 > > --- a/arch/powerpc/kernel/misc_64.S > > +++ b/arch/powerpc/kernel/misc_64.S > > @@ -207,6 +207,9 @@ _GLOBAL(flush_inval_dcache_range) > > * void __flush_dcache_icache(void *page) > > */ > > _GLOBAL(__flush_dcache_icache) > > +BEGIN_FTR_SECTION > > + blr > > +END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) > > /* > > * Flush the data cache to memory > > * > >
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index a781566..32e78e2 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -207,6 +207,9 @@ _GLOBAL(flush_inval_dcache_range) * void __flush_dcache_icache(void *page) */ _GLOBAL(__flush_dcache_icache) +BEGIN_FTR_SECTION + blr +END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) /* * Flush the data cache to memory *
We don't need to flush the dcache and invalidate the icache on the CPU which has CPU_FTR_COHERENT_ICACHE set. Signed-off-by: Kevin Hao <haokexin@gmail.com> --- arch/powerpc/kernel/misc_64.S | 3 +++ 1 file changed, 3 insertions(+)