| Message ID | 1374174785-27578-6-git-send-email-trini@ti.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c index 45f5426..160edd8 100644 --- a/arch/arm/cpu/armv7/am33xx/mem.c +++ b/arch/arm/cpu/armv7/am33xx/mem.c @@ -77,8 +77,8 @@ void gpmc_init(void) /* global settings */ writel(0x00000008, &gpmc_cfg->sysconfig); - writel(0x00000100, &gpmc_cfg->irqstatus); - writel(0x00000100, &gpmc_cfg->irqenable); + writel(0x00000000, &gpmc_cfg->irqstatus); + writel(0x00000000, &gpmc_cfg->irqenable); writel(0x00000012, &gpmc_cfg->config); /* * Disable the GPMC0 config set by ROM code
Based on our usage of the GPMC, either with NOR or NAND we do not need to be setting the irqstatus or irqenable bits and should clear them like we have historically. Signed-off-by: Tom Rini <trini@ti.com> --- arch/arm/cpu/armv7/am33xx/mem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)