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[U-Boot,08/12] ARM: DRA7xx: Correct SRAM END address

Message ID 1369825367-4537-9-git-send-email-lokeshvutla@ti.com
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Lokesh Vutla May 29, 2013, 11:02 a.m. UTC 
From: Sricharan R <r.sricharan@ti.com>

NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
---
 arch/arm/include/asm/arch-omap5/omap.h |    7 -------
 include/configs/dra7xx_evm.h           |    3 +++
 include/configs/omap5_uevm.h           |    3 +++
 3 files changed, 6 insertions(+), 7 deletions(-)

Comments

Tom Rini May 29, 2013, 1:06 p.m. UTC | #1 
On Wed, May 29, 2013 at 04:32:43PM +0530, Lokesh Vutla wrote:

> From: Sricharan R <r.sricharan@ti.com>
> 
> NON SECURE SRAM is 512KB in DRA7xx devices.
> So fixing it here.
> 
> Signed-off-by: Sricharan R <r.sricharan@ti.com>
> ---
>  arch/arm/include/asm/arch-omap5/omap.h |    7 -------
>  include/configs/dra7xx_evm.h           |    3 +++
>  include/configs/omap5_uevm.h           |    3 +++

No, we need to handle this in the include files, not the config files.
SRICHARAN R May 29, 2013, 1:33 p.m. UTC | #2 
On Wednesday 29 May 2013 06:36 PM, Tom Rini wrote:
> On Wed, May 29, 2013 at 04:32:43PM +0530, Lokesh Vutla wrote:
>
>> From: Sricharan R <r.sricharan@ti.com>
>>
>> NON SECURE SRAM is 512KB in DRA7xx devices.
>> So fixing it here.
>>
>> Signed-off-by: Sricharan R <r.sricharan@ti.com>
>> ---
>>  arch/arm/include/asm/arch-omap5/omap.h |    7 -------
>>  include/configs/dra7xx_evm.h           |    3 +++
>>  include/configs/omap5_uevm.h           |    3 +++
> No, we need to handle this in the include files, not the config files.
>
   Ok.. The only concern was headers were shared between
   OMAP5/DRA and this results in #ifdef CONFIG_XX checks.
   Just thinking how to handle this better.

Regards,
 Sricharan
Tom Rini May 29, 2013, 1:53 p.m. UTC | #3 
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On 05/29/2013 09:33 AM, Sricharan R wrote:
> On Wednesday 29 May 2013 06:36 PM, Tom Rini wrote:
>> On Wed, May 29, 2013 at 04:32:43PM +0530, Lokesh Vutla wrote:
>> 
>>> From: Sricharan R <r.sricharan@ti.com>
>>> 
>>> NON SECURE SRAM is 512KB in DRA7xx devices. So fixing it here.
>>> 
>>> Signed-off-by: Sricharan R <r.sricharan@ti.com> --- 
>>> arch/arm/include/asm/arch-omap5/omap.h |    7 ------- 
>>> include/configs/dra7xx_evm.h           |    3 +++ 
>>> include/configs/omap5_uevm.h           |    3 +++
>> No, we need to handle this in the include files, not the config
>> files.
>> 
> Ok.. The only concern was headers were shared between OMAP5/DRA and
> this results in #ifdef CONFIG_XX checks. Just thinking how to
> handle this better.

That's fine.  If we end up with large differences we can split the
files, ala am335x and ti814x (and later, ti816x).

- -- 
Tom
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

iQIcBAEBAgAGBQJRpgg/AAoJENk4IS6UOR1WwpoP/0dzJxZRFRRStw96ef46hi8m
gtCBN4AXxTrv5+d2wgShOxmFTufTqHYJDi68kVKmrB3brMUjpgbp/ApTyi4a4vRh
Dim9VWHHnlFZOKHwJwfDNr6CTx4mPXmI2qs94pfzHOvFmGtfkhYRVF/wbF1XwgW5
86Qep+YW1mr62t3kact+Cg6Pln3Krbb3RjX3waUSZeKzOlifaSI3Dntvp2uLgrA2
YQCIVVYd3TE8L7utgHF48v8x7aRuAxcd5ZtZvtXoVAxXv3zFyyibGyBFFXxnMmLz
0dFwUm9mE1+MYATAjcxlB+OpD5bJDp30JhtF0s42rvrQGyBxy1mdLAQBxR0DxoPa
1GvhQgWKGJKhwXr9TSDT3N1DTCt0nPEzjs7iekz2NLHjhoYMPL/yfj0rliyfaw5o
O2S3I1d1Yy/V0gyLJgAey1SqC4G9n9XQyjsxAeSdosdDHSKUM3w6bkIS+UbTL8OZ
gq1MteO/fddvSGQIR5+YQ6R7boH3BenSOxJRiKNMWVXlDiqZGgMRSEqT/HGnrBgh
WBM0Va5c3HJjce4WXc+gWpJR+QREB6cHuc7lRGjI+VAKFioFDdaDXQSc2TJ6Q74W
QRwl0xCMgykvXekHG9t+KXrSBFh1cDiJXeyI9dD3UnvE09Hzu1DwPCZf/XfhcT+4
ic2Z/9fUSgPfHFqZqOnq
=/EmW
-----END PGP SIGNATURE-----
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index df8222a..15d429f 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -159,13 +159,6 @@  struct s32ktimer {
 #define EFUSE_4 0x45145100
 #endif /* __ASSEMBLY__ */
 
-/*
- * Non-secure SRAM Addresses
- * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
- * at 0x40304000(EMU base) so that our code works for both EMU and GP
- */
-#define NON_SECURE_SRAM_START	0x40300000
-#define NON_SECURE_SRAM_END	0x40320000	/* Not inclusive */
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE	0x4031F000
 
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index b0b0bda..fc35f2f 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -42,4 +42,7 @@ 
 /* Clock Defines */
 #define V_OSCK			20000000	/* Clock output from T2 */
 
+#define NON_SECURE_SRAM_START	0x40300000
+#define NON_SECURE_SRAM_END	0x40380000	/* Not inclusive */
+
 #endif /* __CONFIG_DRA7XX_EVM_H */
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 4f2d425..96c5955 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -61,5 +61,8 @@ 
 /* Clock Defines */
 #define V_OSCK			19200000	/* Clock output from T2 */
 
+#define NON_SECURE_SRAM_START	0x40300000
+#define NON_SECURE_SRAM_END	0x40320000	/* Not inclusive */
+
 #define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC	16296
 #endif /* __CONFIG_OMAP5_EVM_H */