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[3.8.y.z,extended,stable] Patch "arm64: mm: Fix operands of clz in __flush_dcache_all" has been added to staging queue

Message ID 1369259731-25869-1-git-send-email-kamal@canonical.com
State New
Headers show

Commit Message

Kamal Mostafa May 22, 2013, 9:55 p.m. UTC
This is a note to let you know that I have just added a patch titled

    arm64: mm: Fix operands of clz in __flush_dcache_all

to the linux-3.8.y-queue branch of the 3.8.y.z extended stable tree 
which can be found at:

 http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.8.y-queue

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.8.y.z tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Kamal

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From 4250206609d88a5328bcf497caca13317d63a866 Mon Sep 17 00:00:00 2001
From: Sukanto Ghosh <sghosh@apm.com>
Date: Tue, 14 May 2013 10:26:54 +0100
Subject: arm64: mm: Fix operands of clz in __flush_dcache_all

commit b4fed0796841b5293b9c9427a5391b7bb20ef2d9 upstream.

The format of the lower 32-bits of the 64-bit operand to 'dc cisw' is
unchanged from ARMv7 architecture and the upper bits are RES0. This
implies that the 'way' field of the operand of 'dc cisw' occupies the
bit-positions [31 .. (32-A)]. Due to the use of 64-bit extended operands
to 'clz', the existing implementation of __flush_dcache_all is incorrectly
placing the 'way' field in the bit-positions [63 .. (64-A)].

Signed-off-by: Sukanto Ghosh <sghosh@apm.com>
Tested-by: Anup Patel <anup.patel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
---
 arch/arm64/mm/cache.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--
1.8.1.2
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Patch

diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index abe69b8..48a3860 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -52,7 +52,7 @@  loop1:
 	add	x2, x2, #4			// add 4 (line length offset)
 	mov	x4, #0x3ff
 	and	x4, x4, x1, lsr #3		// find maximum number on the way size
-	clz	x5, x4				// find bit position of way size increment
+	clz	w5, w4				// find bit position of way size increment
 	mov	x7, #0x7fff
 	and	x7, x7, x1, lsr #13		// extract max number of the index size
 loop2: