@@ -27,6 +27,7 @@ LIB := $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
+COBJS-$(CONFIG_ORION_GPIO) += orion_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o
new file mode 100644
@@ -0,0 +1,167 @@
+/*
+ * Marvell Orion SoC GPIO handling.
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed orion_gpiochip struct and kernel level irq handling.
+ * Dieter Kiermaier dk-arm-linux@gmx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <asm/bitops.h>
+#include <asm/io.h>
+#include <asm/arch/gpio.h>
+#include <orion_gpio.h>
+
+static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
+
+void __set_direction(unsigned pin, int input)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_IO_CONF(base));
+ if (input)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_IO_CONF(base));
+
+ u = readl(GPIO_IO_CONF(base));
+}
+
+void __set_level(unsigned pin, int high)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_OUT(base));
+ if (high)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_OUT(base));
+}
+
+void __set_blinking(unsigned pin, int blink)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_BLINK_EN(base));
+ if (blink)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_BLINK_EN(base));
+}
+
+int orion_gpio_is_valid(unsigned pin, int mode)
+{
+ if (pin < GPIO_MAX) {
+ if ((mode & GPIO_INPUT_OK) &&
+ !test_bit(pin, gpio_valid_input))
+ goto err_out;
+
+ if ((mode & GPIO_OUTPUT_OK) &&
+ !test_bit(pin, gpio_valid_output))
+ goto err_out;
+ return 0;
+ }
+
+err_out:
+ printf("%s: invalid GPIO %d/%d\n", __func__, pin, GPIO_MAX);
+ return 1;
+}
+
+void orion_gpio_set_valid(unsigned pin, int mode)
+{
+ if (mode & GPIO_INPUT_OK)
+ __set_bit(pin, gpio_valid_input);
+ else
+ __clear_bit(pin, gpio_valid_input);
+ if (mode & GPIO_OUTPUT_OK)
+ __set_bit(pin, gpio_valid_output);
+ else
+ __clear_bit(pin, gpio_valid_output);
+}
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int orion_gpio_direction_input(unsigned pin)
+{
+ if (orion_gpio_is_valid(pin, GPIO_INPUT_OK) != 0)
+ return 1;
+
+ /* Configure GPIO direction. */
+ __set_direction(pin, 1);
+
+ return 0;
+}
+
+int orion_gpio_direction_output(unsigned pin, int value)
+{
+ if (orion_gpio_is_valid(pin, GPIO_OUTPUT_OK) != 0) {
+ printf("%s: invalid GPIO %d\n", __func__, pin);
+ return 1;
+ }
+
+ __set_blinking(pin, 0);
+
+ /* Configure GPIO output value. */
+ __set_level(pin, value);
+
+ /* Configure GPIO direction. */
+ __set_direction(pin, 0);
+
+ return 0;
+}
+
+int orion_gpio_get_value(unsigned pin)
+{
+ u32 base = GPIO_BASE(pin);
+ int val;
+
+ if (readl(GPIO_IO_CONF(base)) & (1 << (pin & 31)))
+ val = readl(GPIO_DATA_IN(base)) ^ readl(GPIO_IN_POL(base));
+ else
+ val = readl(GPIO_OUT(base));
+
+ return (val >> (pin & 31)) & 1;
+}
+
+void orion_gpio_set_value(unsigned pin, int value)
+{
+ /* Configure GPIO output value. */
+ __set_level(pin, value);
+}
+
+void orion_gpio_set_blink(unsigned pin, int blink)
+{
+ /* Set output value to zero. */
+ __set_level(pin, 0);
+
+ /* Set blinking. */
+ __set_blinking(pin, blink);
+}
new file mode 100644
@@ -0,0 +1,64 @@
+/*
+ * Marvell Orion SoCs common gpio
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __ORION_GPIO_H
+#define __ORION_GPIO_H
+
+/*
+ * SoC-specific gpio.h defines
+ * GPIO_MAX and GPIO_BASE(pin) macro
+ */
+
+#define GPIO_INPUT_OK (1 << 0)
+#define GPIO_OUTPUT_OK (1 << 1)
+#define GPIO_LOW 0
+#define GPIO_HIGH 1
+
+/* got from kernel include/linux/bitops.h */
+#define BITS_PER_BYTE 8
+#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
+
+#define GPIO_OUT(base) ((base) + 0x00)
+#define GPIO_IO_CONF(base) ((base) + 0x04)
+#define GPIO_BLINK_EN(base) ((base) + 0x08)
+#define GPIO_IN_POL(base) ((base) + 0x0c)
+#define GPIO_DATA_IN(base) ((base) + 0x10)
+#define GPIO_EDGE_CAUSE(base) ((base) + 0x14)
+#define GPIO_EDGE_MASK(base) ((base) + 0x18)
+#define GPIO_LEVEL_MASK(base) ((base) + 0x1c)
+
+/*
+ * Orion-specific GPIO API
+ */
+
+void orion_gpio_set_valid(unsigned pin, int mode);
+int orion_gpio_is_valid(unsigned pin, int mode);
+int orion_gpio_direction_input(unsigned pin);
+int orion_gpio_direction_output(unsigned pin, int value);
+int orion_gpio_get_value(unsigned pin);
+void orion_gpio_set_value(unsigned pin, int value);
+void orion_gpio_set_blink(unsigned pin, int blink);
+void orion_gpio_set_unused(unsigned pin);
+
+#endif
This adds a gpio driver for Marvell Orion SoCs, i.e. orion5x, kirkwood, dove. This is based on kw_gpio but as gpio capabilities depend heavily on the mpp configuration for dove, it allows to set gpi/gpo capabilities from mpp. This should be compatible with the current kw_gpio and porting mpp of kirkwood and orion5x is appreciated. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Daniel Stodden <daniel.stodden@gmail.com> Cc: Luka Perkov <luka@openwrt.org> --- drivers/gpio/Makefile | 1 + drivers/gpio/orion_gpio.c | 167 +++++++++++++++++++++++++++++++++++++++++++++ include/orion_gpio.h | 64 +++++++++++++++++ 3 files changed, 232 insertions(+) create mode 100644 drivers/gpio/orion_gpio.c create mode 100644 include/orion_gpio.h