| Message ID | 20090123165128.74270@gmx.net (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Benjamin Herrenschmidt |
| Headers | show |
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c index 45d9253..fe65c40 100644 --- a/arch/powerpc/mm/ppc_mmu_32.c +++ b/arch/powerpc/mm/ppc_mmu_32.c @@ -123,9 +123,9 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys, int wimgxpp; struct ppc_bat *bat = BATS[index]; - if (((flags & _PAGE_NO_CACHE) == 0) && - cpu_has_feature(CPU_FTR_NEED_COHERENT)) - flags |= _PAGE_COHERENT; + if ((flags & _PAGE_NO_CACHE) || + (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0)) + flags &= ~_PAGE_COHERENT; bl = (size >> 17) - 1; if (PVR_VER(mfspr(SPRN_PVR)) != 1) {
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL. Thus it has to be masked out, if the BAT mapping should be non cacheable or CPU_FTR_NEED_COHERENT is not set. Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net> --- arch/powerpc/mm/ppc_mmu_32.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)