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[U-Boot,v2,8/9] arm: rmobile: kzm9g: enable I2C1

Message ID 1347439573-19443-9-git-send-email-koba@kmckk.co.jp
State Superseded
Delegated to: Heiko Schocher
Headers show

Commit Message

Tetsuyuki Kobayashi Sept. 12, 2012, 8:46 a.m. UTC 
Supply clock to I2C1 and release resetting.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
---
Changes for v2:
 - new

 board/kmc/kzm9g/kzm9g.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Nobuhiro Iwamatsu Sept. 13, 2012, 5:18 a.m. UTC | #1 
On Wed, Sep 12, 2012 at 5:46 PM, Tetsuyuki Kobayashi <koba@kmckk.co.jp> wrote:
> Supply clock to I2C1 and release resetting.
>
> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
> ---
> Changes for v2:
>  - new
>
>  board/kmc/kzm9g/kzm9g.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
> index 0679be6..93ca9d7 100644
> --- a/board/kmc/kzm9g/kzm9g.c
> +++ b/board/kmc/kzm9g/kzm9g.c
> @@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define SMSTPCR1_CMT0  (1 << 24)
>  #define SMSTPCR1_I2C0  (1 << 16)
>  #define SMSTPCR3_USB   (1 << 22)
> +#define SMSTPCR3_I2C1  (1 << 23)
>
>  #define PORT32CR (0xE6051020)
>  #define PORT33CR (0xE6051021)
> @@ -300,8 +301,8 @@ int board_early_init_f(void)
>
>         clrbits_le32(&cpg->smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
>         clrbits_le32(&cpg_srcr->srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
> -       clrbits_le32(&cpg->smstpcr3, SMSTPCR3_USB);
> -       clrbits_le32(&cpg_srcr->srcr3, SMSTPCR3_USB);
> +       clrbits_le32(&cpg->smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
> +       clrbits_le32(&cpg_srcr->srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
>         writel(VCLKCR1_D, &cpg->vclkcr1);
>
>         /* Setup SCIF4 / workaround */
> --
> 1.7.9.5
>

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Best regards,
  Nobuhiro
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Patch

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 0679be6..93ca9d7 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -43,6 +43,7 @@  DECLARE_GLOBAL_DATA_PTR;
 #define SMSTPCR1_CMT0	(1 << 24)
 #define SMSTPCR1_I2C0	(1 << 16)
 #define SMSTPCR3_USB	(1 << 22)
+#define SMSTPCR3_I2C1	(1 << 23)
 
 #define PORT32CR (0xE6051020)
 #define PORT33CR (0xE6051021)
@@ -300,8 +301,8 @@  int board_early_init_f(void)
 
 	clrbits_le32(&cpg->smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
 	clrbits_le32(&cpg_srcr->srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
-	clrbits_le32(&cpg->smstpcr3, SMSTPCR3_USB);
-	clrbits_le32(&cpg_srcr->srcr3, SMSTPCR3_USB);
+	clrbits_le32(&cpg->smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
+	clrbits_le32(&cpg_srcr->srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
 	writel(VCLKCR1_D, &cpg->vclkcr1);
 
 	/* Setup SCIF4 / workaround */