Message ID | 20120807222841.GK7791@nvidia.com |
---|---|
State | Superseded |
Delegated to: | Tom Warren |
Headers | show |
Am Dienstag, den 07.08.2012, 15:28 -0700 schrieb Allen Martin: > On Tue, Aug 07, 2012 at 10:53:00AM -0700, Lucas Stach wrote: > > Hi Allen, > > > > And to answer Tom's question: the failure was that the real U-Boot would > > not come up after the SPL. All I could see was the one line printed by > > the SPL and nothing more. > > I think I found the problem. It's the following code from start.S: > > ENTRY(cpu_init_crit) > /* > * Jump to board specific initialization... > * The Mask ROM will have already initialized > * basic memory. Go here to bump up clock rate and handle > * wake up conditions. > */ > mov ip, lr @ persevere link reg across > call > bl lowlevel_init @ go setup pll,mux,memory > mov lr, ip @ restore link > mov pc, lr @ back to my caller > ENDPROC(cpu_init_crit) > > > The "ip" register is not preserved across function calls, and the > CodeSourcery compiler is using it in lowlevel_init or one of the > functions it calls. This code was there before the SPL changes, but > wasn't being called because CONFIG_SKIP_LOWLEVEL_INIT was set, but now > it isn't. > > Lucas, can you try the following change? I tested it on seaboard with > CodeSourcery arm-2011.09-70-arm-none-linux-gnueabi and I'm able to > boot a kernel. Yes I can confirm this fixes the issue without further workarounds. Thanks, and: Tested-by: Lucas Stach <dev@lynxeye.de> > > Tom if this works we probably want to get it into your pull request to > Albert. CodeSourcery toolchain is probably used by a lot of people. > > -Allen > > > diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S > index 2506f27..02e47fa 100644 > --- a/arch/arm/cpu/armv7/start.S > +++ b/arch/arm/cpu/armv7/start.S > @@ -152,7 +152,7 @@ reset: > /* the mask ROM code should have PLL and others stable */ > #ifndef CONFIG_SKIP_LOWLEVEL_INIT > bl cpu_init_cp15 > - bl cpu_init_crit > + bl lowlevel_init @ go setup pll,mux,memory > #endif > > /* Set stackpointer in internal RAM to call board_init_f */ > @@ -339,29 +339,6 @@ ENTRY(cpu_init_cp15) > mov pc, lr @ back to my caller > ENDPROC(cpu_init_cp15) > > -#ifndef CONFIG_SKIP_LOWLEVEL_INIT > -/************************************************************************* > - * > - * CPU_init_critical registers > - * > - * setup important registers > - * setup memory timing > - * > - *************************************************************************/ > -ENTRY(cpu_init_crit) > - /* > - * Jump to board specific initialization... > - * The Mask ROM will have already initialized > - * basic memory. Go here to bump up clock rate and handle > - * wake up conditions. > - */ > - mov ip, lr @ persevere link reg across > -call > - bl lowlevel_init @ go setup pll,mux,memory > - mov lr, ip @ restore link > - mov pc, lr @ back to my caller > -ENDPROC(cpu_init_crit) > -#endif > - > #ifndef CONFIG_SPL_BUILD > /* > ************************************************************************* > >
On Tue, Aug 07, 2012 at 03:42:45PM -0700, Lucas Stach wrote: > Am Dienstag, den 07.08.2012, 15:28 -0700 schrieb Allen Martin: > > On Tue, Aug 07, 2012 at 10:53:00AM -0700, Lucas Stach wrote: > > > Hi Allen, > > > > > > And to answer Tom's question: the failure was that the real U-Boot would > > > not come up after the SPL. All I could see was the one line printed by > > > the SPL and nothing more. > > > > I think I found the problem. It's the following code from start.S: > > > > ENTRY(cpu_init_crit) > > /* > > * Jump to board specific initialization... > > * The Mask ROM will have already initialized > > * basic memory. Go here to bump up clock rate and handle > > * wake up conditions. > > */ > > mov ip, lr @ persevere link reg across > > call > > bl lowlevel_init @ go setup pll,mux,memory > > mov lr, ip @ restore link > > mov pc, lr @ back to my caller > > ENDPROC(cpu_init_crit) > > > > > > The "ip" register is not preserved across function calls, and the > > CodeSourcery compiler is using it in lowlevel_init or one of the > > functions it calls. This code was there before the SPL changes, but > > wasn't being called because CONFIG_SKIP_LOWLEVEL_INIT was set, but now > > it isn't. > > > > Lucas, can you try the following change? I tested it on seaboard with > > CodeSourcery arm-2011.09-70-arm-none-linux-gnueabi and I'm able to > > boot a kernel. > > Yes I can confirm this fixes the issue without further workarounds. > Thanks, and: > > Tested-by: Lucas Stach <dev@lynxeye.de> Digging a little deeper into this, cpu_init_crit() and lowlevel_init() are called before the stack is setup, so the fact that we call into C code on tegra here is probably the bigger issue. I think the correct fix here is for me to move the code from lowlevel_init() to board_init_f(). -Allen
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 2506f27..02e47fa 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -152,7 +152,7 @@ reset: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_cp15 - bl cpu_init_crit + bl lowlevel_init @ go setup pll,mux,memory #endif /* Set stackpointer in internal RAM to call board_init_f */ @@ -339,29 +339,6 @@ ENTRY(cpu_init_cp15) mov pc, lr @ back to my caller ENDPROC(cpu_init_cp15) -#ifndef CONFIG_SKIP_LOWLEVEL_INIT -/************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - *************************************************************************/ -ENTRY(cpu_init_crit) - /* - * Jump to board specific initialization... - * The Mask ROM will have already initialized - * basic memory. Go here to bump up clock rate and handle - * wake up conditions. - */ - mov ip, lr @ persevere link reg across -call - bl lowlevel_init @ go setup pll,mux,memory - mov lr, ip @ restore link - mov pc, lr @ back to my caller -ENDPROC(cpu_init_crit) -#endif - #ifndef CONFIG_SPL_BUILD /* *************************************************************************