| Message ID | 1341645957-28368-1-git-send-email-marex@denx.de |
|---|---|
| State | Accepted |
| Commit | 401650a19c9c1d197e9791e82c5fc5af1ed6619d |
| Delegated to: | Stefano Babic |
| Headers | show |
Bump? > The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1 > Also, it was using SSP0 DMA channel for all SSP devices. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Wolfgang Denk <wd@denx.de> > Cc: Stefano Babic <sbabic@denx.de> > Cc: Fabio Estevam <festevam@freescale.com> > Cc: Andy Fleming <afleming@freescale.com> > --- > drivers/mmc/mxsmmc.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > NOTE: This series is for -next! > > diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c > index 4187a94..a637db3 100644 > --- a/drivers/mmc/mxsmmc.c > +++ b/drivers/mmc/mxsmmc.c > @@ -79,6 +79,7 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, > struct mmc_data *data) uint32_t *data_ptr; > #else > uint32_t cache_data_count; > + int dmach; > #endif > > debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx); > @@ -201,6 +202,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, > struct mmc_data *data) timeout = MXSMMC_MAX_TIMEOUT; > > #ifdef CONFIG_MXS_MMC_DMA > + writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); > + > if (data_count % ARCH_DMA_MINALIGN) > cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN); > else > @@ -222,8 +225,9 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, > struct mmc_data *data) (data_count << MXS_DMA_DESC_BYTES_OFFSET); > > > - mxs_dma_desc_append(MXS_DMA_CHANNEL_AHB_APBH_SSP0, priv->desc); > - if (mxs_dma_go(MXS_DMA_CHANNEL_AHB_APBH_SSP0)) { > + dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; > + mxs_dma_desc_append(dmach, priv->desc); > + if (mxs_dma_go(dmach)) { > printf("MMC%d: DMA transfer failed\n", mmc->block_dev.dev); > return COMM_ERR; > } > @@ -234,6 +238,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, > struct mmc_data *data) (uint32_t)(priv->desc->cmd.address + > cache_data_count)); > } > #else > + writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); > + > if (data->flags & MMC_DATA_READ) { > data_ptr = (uint32_t *)data->dest; > while (data_count && --timeout) { Best regards, Marek Vasut
Dear Marek Vasut, > The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1. > Also, it was using SSP0 DMA channel for all SSP devices. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Wolfgang Denk <wd@denx.de> > Cc: Stefano Babic <sbabic@denx.de> > Cc: Fabio Estevam <festevam@freescale.com> > Cc: Andy Fleming <afleming@freescale.com> Stefano, can you please apply these? They fix trouble and improve the platform and I ain't getting no reply from Andy and they shouldn't colide with anything in his tree. Best regards, Marek Vasut
On 06/08/2012 23:23, Marek Vasut wrote: > Dear Marek Vasut, > >> The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1. >> Also, it was using SSP0 DMA channel for all SSP devices. >> >> Signed-off-by: Marek Vasut <marex@denx.de> >> Cc: Wolfgang Denk <wd@denx.de> >> Cc: Stefano Babic <sbabic@denx.de> >> Cc: Fabio Estevam <festevam@freescale.com> >> Cc: Andy Fleming <afleming@freescale.com> > > Stefano, can you please apply these? They fix trouble and improve the platform > and I ain't getting no reply from Andy and they shouldn't colide with anything > in his tree. Ok - changes are only related to the MX28 driver. Maybe the patches should be in any case merged into u-boot-imx and not into u-boot-mmc. I am often unsure which custodian should take care of patches when they spread across more as one area. I will merge them now. Best regards, Stefano
On 07/07/2012 09:25, Marek Vasut wrote: > The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1. > Also, it was using SSP0 DMA channel for all SSP devices. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Wolfgang Denk <wd@denx.de> > Cc: Stefano Babic <sbabic@denx.de> > Cc: Fabio Estevam <festevam@freescale.com> > Cc: Andy Fleming <afleming@freescale.com> > --- Whole series applied to u-boot-imx, thanks. Best regards, Stefano Babic
Dear Stefano Babic, > On 06/08/2012 23:23, Marek Vasut wrote: > > Dear Marek Vasut, > > > >> The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1. > >> Also, it was using SSP0 DMA channel for all SSP devices. > >> > >> Signed-off-by: Marek Vasut <marex@denx.de> > >> Cc: Wolfgang Denk <wd@denx.de> > >> Cc: Stefano Babic <sbabic@denx.de> > >> Cc: Fabio Estevam <festevam@freescale.com> > >> Cc: Andy Fleming <afleming@freescale.com> > > > > Stefano, can you please apply these? They fix trouble and improve the > > platform and I ain't getting no reply from Andy and they shouldn't > > colide with anything in his tree. > > Ok - changes are only related to the MX28 driver. Maybe the patches > should be in any case merged into u-boot-imx and not into u-boot-mmc. They should definitelly go through u-boot-mmc, I'm just circumventing the system here really, since I didn't get reply from Andy for a while. > I am often unsure which custodian should take care of patches when they > spread across more as one area. Andy (mmc) in this case ;-) > I will merge them now. > > Best regards, > Stefano Best regards, Marek Vasut
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 4187a94..a637db3 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -79,6 +79,7 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) uint32_t *data_ptr; #else uint32_t cache_data_count; + int dmach; #endif debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx); @@ -201,6 +202,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) timeout = MXSMMC_MAX_TIMEOUT; #ifdef CONFIG_MXS_MMC_DMA + writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); + if (data_count % ARCH_DMA_MINALIGN) cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN); else @@ -222,8 +225,9 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) (data_count << MXS_DMA_DESC_BYTES_OFFSET); - mxs_dma_desc_append(MXS_DMA_CHANNEL_AHB_APBH_SSP0, priv->desc); - if (mxs_dma_go(MXS_DMA_CHANNEL_AHB_APBH_SSP0)) { + dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; + mxs_dma_desc_append(dmach, priv->desc); + if (mxs_dma_go(dmach)) { printf("MMC%d: DMA transfer failed\n", mmc->block_dev.dev); return COMM_ERR; } @@ -234,6 +238,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) (uint32_t)(priv->desc->cmd.address + cache_data_count)); } #else + writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); + if (data->flags & MMC_DATA_READ) { data_ptr = (uint32_t *)data->dest; while (data_count && --timeout) {
The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1. Also, it was using SSP0 DMA channel for all SSP devices. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Cc: Andy Fleming <afleming@freescale.com> --- drivers/mmc/mxsmmc.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) NOTE: This series is for -next!