Patchwork sam460ex, sm501 incorrect device id with kernel >=linux-2.6.39

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Submitter acrux
Date Dec. 2, 2011, 2:48 p.m.
Message ID <20111202154833.72c75615.acrux_it@libero.it>
Download mbox | patch
Permalink /patch/128880/
State Not Applicable
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acrux - Dec. 2, 2011, 2:48 p.m.
On Mon, 28 Nov 2011 21:22:24 +0100
Anatolij Gustschin <agust@denx.de> wrote:

> On Mon, 28 Nov 2011 20:56:55 +0100
> acrux <acrux_it@libero.it> wrote:
> ...
> > it seems to be an endianess issue but i didn't find when it was
> > introduced.  Really strange this kind of issue was never noticed
> > bumping from 2.6.38.x to 2.6.39.x .
> 
> Look at commit bf5f0019046d596d613caf74722ba4994e153899
> (video, sm501: add I/O functions for use on powerpc).
> This is the issue, I think. Especially changes in
> include/linux/sm501.h by this commit. Since CONFIG_PPC32 is defined
> for canyonlands, ioread32be() is used to access the registers at PCI
> space which is wrong. The patch was tested on tqm5200 with sm501
> connected on localbus, so using ioread32be() worked there. Your sm502
> is on PCI bus I suppose. This issue needs to be fixed.
> 


well, the commit suggested is this one:
http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=commitdiff;h=bf5f0019046d596d613caf74722ba4994e153899


This little hack fix my problem:


but instead, why am I obliged to read it as little endian to have the correct value? 

thanks for your help,
--nico
Anatolij Gustschin - Dec. 2, 2011, 3:35 p.m.
Hi,

On Fri, 2 Dec 2011 15:48:33 +0100
acrux <acrux_it@libero.it> wrote:
...
> This little hack fix my problem:
> --- a/inlcude/linux/sm501.h	2011-12-02 01:11:04.000000000 +0100
> +++ b/include/linux/sm501.h	2011-12-02 01:11:09.000000000 +0100
> @@ -174,8 +174,8 @@
>  };
>  
>  #if defined(CONFIG_PPC32)
> -#define smc501_readl(addr)		ioread32be((addr))
> -#define smc501_writel(val, addr)	iowrite32be((val), (addr))
> +#define smc501_readl(addr)		ioread32((addr))
> +#define smc501_writel(val, addr)	iowrite32((val), (addr))
>  #else
>  #define smc501_readl(addr)		readl(addr)
>  #define smc501_writel(val, addr)	writel(val, addr)
> 
> 
> but instead, why am I obliged to read it as little endian to have the correct value? 

The SM502 registers are in little endian format, you access them
over PCI interface, that is the reason. The commit introduced
a regression, I'll try to fix it this weekend. IIRC, there is
a flag to switch to big-endian register format in SM502, but
I'm not sure if it will also affect frame buffer data format.

Anatolij

Patch

--- a/inlcude/linux/sm501.h	2011-12-02 01:11:04.000000000 +0100
+++ b/include/linux/sm501.h	2011-12-02 01:11:09.000000000 +0100
@@ -174,8 +174,8 @@ 
 };
 
 #if defined(CONFIG_PPC32)
-#define smc501_readl(addr)		ioread32be((addr))
-#define smc501_writel(val, addr)	iowrite32be((val), (addr))
+#define smc501_readl(addr)		ioread32((addr))
+#define smc501_writel(val, addr)	iowrite32((val), (addr))
 #else
 #define smc501_readl(addr)		readl(addr)
 #define smc501_writel(val, addr)	writel(val, addr)