Patchwork [U-Boot] x86: Fix IDE configuration for the coreboot board

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Submitter Gabe Black
Date Nov. 29, 2011, 5:21 a.m.
Message ID <1322544072-16592-1-git-send-email-gabeblack@chromium.org>
Download mbox | patch
Permalink /patch/128214/
State Superseded
Delegated to: Graeme Russ
Headers show

Comments

Gabe Black - Nov. 29, 2011, 5:21 a.m.
The ports for the IDE controller were reversed. Because u-boot was
configured to look for at most one bus with one disk attached, it looked at
the wrong one, didn't find anything, and quit looking.

This change does not increase the number of busses or devices per bus that
u-boot should check for because scanning for them adds a noticable pause
during boot. It does, however, correct some comments describing the limits.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
---
 include/configs/coreboot.h |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
Gabe Black - Nov. 29, 2011, 5:22 a.m.
I missed this patch when I was gathering up the change which introduce the
coreboot cpu/board/config. This should be applied on top of it, or folded
into it.

Gabe

On Mon, Nov 28, 2011 at 9:21 PM, Gabe Black <gabeblack@chromium.org> wrote:

> The ports for the IDE controller were reversed. Because u-boot was
> configured to look for at most one bus with one disk attached, it looked at
> the wrong one, didn't find anything, and quit looking.
>
> This change does not increase the number of busses or devices per bus that
> u-boot should check for because scanning for them adds a noticable pause
> during boot. It does, however, correct some comments describing the limits.
>
> Signed-off-by: Gabe Black <gabeblack@chromium.org>
> ---
>  include/configs/coreboot.h |    8 ++++----
>  1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
> index c658436..348a25b 100644
> --- a/include/configs/coreboot.h
> +++ b/include/configs/coreboot.h
> @@ -67,14 +67,14 @@
>  #define CONFIG_SYS_NS16550_COM2        UART1_BASE
>  #define CONFIG_SYS_NS16550_PORT_MAPPED
>
> -/* max. 2 IDE busses   */
> +/* max. 1 IDE bus      */
>  #define CONFIG_SYS_IDE_MAXBUS          1
> -/* max. 2 drives per IDE bus */
> +/* max. 1 drive per IDE bus */
>  #define CONFIG_SYS_IDE_MAXDEVICE       (CONFIG_SYS_IDE_MAXBUS * 1)
>
>  #define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_ISA_IO_BASE_ADDRESS
> -#define CONFIG_SYS_ATA_IDE0_OFFSET     0x0170
> -#define CONFIG_SYS_ATA_IDE1_OFFSET     0x01F0
> +#define CONFIG_SYS_ATA_IDE0_OFFSET     0x01f0
> +#define CONFIG_SYS_ATA_IDE1_OFFSET     0x0170
>  #define CONFIG_SYS_ATA_DATA_OFFSET     0
>  #define CONFIG_SYS_ATA_REG_OFFSET      0
>  #define CONFIG_SYS_ATA_ALT_OFFSET      0x200
> --
> 1.7.3.1
>
>

Patch

diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index c658436..348a25b 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -67,14 +67,14 @@ 
 #define CONFIG_SYS_NS16550_COM2	UART1_BASE
 #define CONFIG_SYS_NS16550_PORT_MAPPED
 
-/* max. 2 IDE busses	*/
+/* max. 1 IDE bus	*/
 #define CONFIG_SYS_IDE_MAXBUS		1
-/* max. 2 drives per IDE bus */
+/* max. 1 drive per IDE bus */
 #define CONFIG_SYS_IDE_MAXDEVICE	(CONFIG_SYS_IDE_MAXBUS * 1)
 
 #define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_SYS_ISA_IO_BASE_ADDRESS
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0170
-#define CONFIG_SYS_ATA_IDE1_OFFSET	0x01F0
+#define CONFIG_SYS_ATA_IDE0_OFFSET	0x01f0
+#define CONFIG_SYS_ATA_IDE1_OFFSET	0x0170
 #define CONFIG_SYS_ATA_DATA_OFFSET	0
 #define CONFIG_SYS_ATA_REG_OFFSET	0
 #define CONFIG_SYS_ATA_ALT_OFFSET	0x200