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[U-Boot,2/2] sh7757lcr: change config for new sh_eth driver

Message ID 4E940827.4040108@renesas.com
State Awaiting Upstream
Headers show

Commit Message

Yoshihiro Shimoda Oct. 11, 2011, 9:11 a.m. UTC
The new sh_eth driver uses the phy driver. So, this patch enables it.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 If this patch is OK, I will submit patches of espt.h and sh7763rdp.h later.

 include/configs/sh7757lcr.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

Comments

Nobuhiro Iwamatsu Oct. 26, 2011, 1:47 a.m. UTC | #1
Applied, thanks.

Best regards,
  Nobuhiro

2011/10/11 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>:
> The new sh_eth driver uses the phy driver. So, this patch enables it.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
>  If this patch is OK, I will submit patches of espt.h and sh7763rdp.h later.
>
>  include/configs/sh7757lcr.h |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
> index 4a5fd0d..63b39d6 100644
> --- a/include/configs/sh7757lcr.h
> +++ b/include/configs/sh7757lcr.h
> @@ -37,6 +37,7 @@
>
>  #define CONFIG_CMD_MEMORY
>  #define CONFIG_CMD_NET
> +#define CONFIG_CMD_MII
>  #define CONFIG_CMD_PING
>  #define CONFIG_CMD_NFS
>  #define CONFIG_CMD_DFL
> @@ -101,6 +102,9 @@
>  #define CONFIG_SH_ETHER_USE_PORT       0
>  #define CONFIG_SH_ETHER_PHY_ADDR       1
>  #define CONFIG_SH_ETHER_CACHE_WRITEBACK        1
> +#define CONFIG_PHYLIB
> +#define CONFIG_BITBANGMII
> +#define CONFIG_BITBANGMII_MULTI
>
>  #define SH7757LCR_ETHERNET_MAC_BASE_SPI        0x000b0000
>  #define SH7757LCR_SPI_SECTOR_SIZE      (64 * 1024)
> --
> 1.7.1
>
diff mbox

Patch

diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 4a5fd0d..63b39d6 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -37,6 +37,7 @@ 

 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_DFL
@@ -101,6 +102,9 @@ 
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	1
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
+#define CONFIG_PHYLIB
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI

 #define SH7757LCR_ETHERNET_MAC_BASE_SPI	0x000b0000
 #define SH7757LCR_SPI_SECTOR_SIZE	(64 * 1024)