[U-Boot,2/2] board: ti: am654: select SYS_DISABLE_DCACHE_OPS for arm64 build
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Message ID 20190408170300.20159-3-vigneshr@ti.com
State Changes Requested
Delegated to: Tom Rini
Headers show
  • Add Kconfig to disable cache ops
Related show

Commit Message

Vignesh Raghavendra April 8, 2019, 5:03 p.m. UTC
AM654 SoC is IO coherent wrt A53 cores, therefore enable
SYS_DISABLE_DCACHE_OPS to avoid cache operations in A53

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Changes since RFC:
Rename config option to SYS_DISABLE_DCACHE_OPS

 board/ti/am65x/Kconfig | 1 +
 1 file changed, 1 insertion(+)

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diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index d4b36dbb42f3..98172c28f5d3 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -11,6 +11,7 @@  config TARGET_AM654_A53_EVM
 	bool "TI K3 based AM654 EVM running on A53"
 	select ARM64
 	select SOC_K3_AM6
 config TARGET_AM654_R5_EVM
 	bool "TI K3 based AM654 EVM running on R5"