[2/2] i2c: rcar: refactor TCYC handling

The latest documentation made it clear that we need to initialize the
TCYC value independently of DMA. Simplify the code to do that.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/i2c/busses/i2c-rcar.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

On Mon, Jan 21, 2019 at 06:08:00PM +0100, Wolfram Sang wrote:
> The latest documentation made it clear that we need to initialize the
> TCYC value independently of DMA. Simplify the code to do that.

Hi Wolfram,

I see TCYC bit 6 is no longer used after this patch.
Does that warrant a mention in the changelog?

> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
>  drivers/i2c/busses/i2c-rcar.c | 15 ++++++---------
>  1 file changed, 6 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
> index 4da7a1f6178b..48312f22094c 100644
> --- a/drivers/i2c/busses/i2c-rcar.c
> +++ b/drivers/i2c/busses/i2c-rcar.c
> @@ -39,8 +39,8 @@
>  #define ICSAR	0x1C	/* slave address */
>  #define ICMAR	0x20	/* master address */
>  #define ICRXTX	0x24	/* data port */
> -#define ICDMAER	0x3c	/* DMA enable */
> -#define ICFBSCR	0x38	/* first bit setup cycle */
> +#define ICFBSCR	0x38	/* first bit setup cycle (Gen3) */
> +#define ICDMAER	0x3c	/* DMA enable (Gen3) */
>  
>  /* ICSCR */
>  #define SDBS	(1 << 3)	/* slave data buffer select */
> @@ -83,7 +83,6 @@
>  #define TMDMAE	(1 << 0)	/* DMA Master Transmitted Enable */
>  
>  /* ICFBSCR */
> -#define TCYC06	0x04		/*  6*Tcyc delay 1st bit between SDA and SCL */
>  #define TCYC17	0x0f		/* 17*Tcyc delay 1st bit between SDA and SCL */
>  
>  
> @@ -212,6 +211,10 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
>  	rcar_i2c_write(priv, ICMSR, 0);
>  	/* start clock */
>  	rcar_i2c_write(priv, ICCCR, priv->icccr);
> +
> +	if (priv->devtype == I2C_RCAR_GEN3)
> +		rcar_i2c_write(priv, ICFBSCR, TCYC17);
> +
>  }
>  
>  static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
> @@ -363,9 +366,6 @@ static void rcar_i2c_dma_unmap(struct rcar_i2c_priv *priv)
>  	/* Disable DMA Master Received/Transmitted */
>  	rcar_i2c_write(priv, ICDMAER, 0);
>  
> -	/* Reset default delay */
> -	rcar_i2c_write(priv, ICFBSCR, TCYC06);
> -
>  	dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg),
>  			 sg_dma_len(&priv->sg), priv->dma_direction);
>  
> @@ -461,9 +461,6 @@ static void rcar_i2c_dma(struct rcar_i2c_priv *priv)
>  		return;
>  	}
>  
> -	/* Set delay for DMA operations */
> -	rcar_i2c_write(priv, ICFBSCR, TCYC17);
> -
>  	/* Enable DMA Master Received/Transmitted */
>  	if (read)
>  		rcar_i2c_write(priv, ICDMAER, RMDMAE);
> -- 
> 2.11.0
>

On Wed, Jan 23, 2019 at 11:25:06AM +0100, Simon Horman wrote:
> On Mon, Jan 21, 2019 at 06:08:00PM +0100, Wolfram Sang wrote:
> > The latest documentation made it clear that we need to initialize the
> > TCYC value independently of DMA. Simplify the code to do that.
> 
> Hi Wolfram,
> 
> I see TCYC bit 6 is no longer used after this patch.
> Does that warrant a mention in the changelog?

Do you think so? The old code used TCYC06 (wrongly) for non-DMA transfers.
The new code sets TCYC up "independently from DMA" <- commit message.

On Wed, Jan 23, 2019 at 06:39:26PM +0100, Wolfram Sang wrote:
> On Wed, Jan 23, 2019 at 11:25:06AM +0100, Simon Horman wrote:
> > On Mon, Jan 21, 2019 at 06:08:00PM +0100, Wolfram Sang wrote:
> > > The latest documentation made it clear that we need to initialize the
> > > TCYC value independently of DMA. Simplify the code to do that.
> > 
> > Hi Wolfram,
> > 
> > I see TCYC bit 6 is no longer used after this patch.
> > Does that warrant a mention in the changelog?
> 
> Do you think so? The old code used TCYC06 (wrongly) for non-DMA transfers.
> The new code sets TCYC up "independently from DMA" <- commit message.

FWIIW, the text above is much clearer to me than the original changelog.
But perhaps that is more a reflection on me than anything else.