Add -march=bdw support

Hi,
This patch adds march for broadwell cpu.
-march=bdw is the same as -march=core-avx2  but with support for rdseed,
adcx, prefetchw. OK for trunk?

Thanks.

2013-12-19  Tocar Ilya  <ilya.tocar@intel.com> 

	* config.gcc: Support march=bdw.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect broadwell.
	* config/i386/i386.c (ix86_option_override_internal): Add bdw.
	* doc/invoke.texi: Document march=bdw.

---
 gcc/config.gcc                | 2 +-
 gcc/config/i386/driver-i386.c | 5 ++++-
 gcc/config/i386/i386.c        | 7 +++++++
 gcc/doc/invoke.texi           | 5 +++++
 4 files changed, 17 insertions(+), 2 deletions(-)

On Thu, Dec 19, 2013 at 5:11 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
> Hi,
> This patch adds march for broadwell cpu.
> -march=bdw is the same as -march=core-avx2  but with support for rdseed,
> adcx, prefetchw. OK for trunk?
>
> Thanks.
>
> 2013-12-19  Tocar Ilya  <ilya.tocar@intel.com>
>
>         * config.gcc: Support march=bdw.
>         * config/i386/driver-i386.c (host_detect_local_cpu): Detect broadwell.

                                  ^Capital B.
>         * config/i386/i386.c (ix86_option_override_internal): Add bdw.
>         * doc/invoke.texi: Document march=bdw.
>
> ---
>  gcc/config.gcc                | 2 +-
>  gcc/config/i386/driver-i386.c | 5 ++++-
>  gcc/config/i386/i386.c        | 7 +++++++
>  gcc/doc/invoke.texi           | 5 +++++
>  4 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index 8464d8f..1edbd4d 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -3676,7 +3676,7 @@ case "${target}" in
>                         | opteron-sse3 | athlon-fx | bdver4 | bdver3 | bdver2 \
>                         | bdver1 | btver2 |  btver1 | amdfam10 | barcelona \
>                         | nocona | core2 | corei7 | corei7-avx | core-avx-i \
> -                       | core-avx2 | atom | slm)
> +                       | core-avx2 | bdw | atom | slm)
>                                 # OK
>                                 ;;
>                         *)
> diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
> index 0b8af3f..6a5c654 100644
> --- a/gcc/config/i386/driver-i386.c
> +++ b/gcc/config/i386/driver-i386.c
> @@ -689,7 +689,10 @@ const char *host_detect_local_cpu (int argc, const char **argv)
>           if (arch)
>             {
>               /* This is unknown family 0x6 CPU.  */
> -             if (has_avx2)
> +             if (has_adx)
> +               /* Assume Broadwell.  */
> +               cpu = "bdw";
> +             else if (has_avx2)
>                 /* Assume Haswell.  */
>                 cpu = "core-avx2";
>               else if (has_avx)
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index cdd63e5..5f2f13b 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -3136,6 +3136,13 @@ ix86_option_override_internal (bool main_args_p,
>         | PTA_RDRND | PTA_F16C | PTA_BMI | PTA_BMI2 | PTA_LZCNT
>         | PTA_FMA | PTA_MOVBE | PTA_RTM | PTA_HLE | PTA_FXSR | PTA_XSAVE
>         | PTA_XSAVEOPT},
> +      {"bdw", PROCESSOR_HASWELL, CPU_COREI7,
> +       PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
> +       | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX | PTA_AVX2
> +       | PTA_CX16 | PTA_POPCNT | PTA_AES | PTA_PCLMUL | PTA_FSGSBASE
> +       | PTA_RDRND | PTA_F16C | PTA_BMI | PTA_BMI2 | PTA_LZCNT
> +       | PTA_FMA | PTA_MOVBE | PTA_RTM | PTA_HLE | PTA_FXSR | PTA_XSAVE
> +       | PTA_XSAVEOPT | PTA_ADX | PTA_PRFCHW | PTA_RDSEED},
>        {"atom", PROCESSOR_ATOM, CPU_ATOM,
>         PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
>         | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE | PTA_FXSR},
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 782a472..0ba03e9 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -14647,6 +14647,11 @@ Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
>  SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
>  BMI, BMI2 and F16C instruction set support.
>
> +@item bdw
> +Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,

Just say Intel Broadwell CPU.

> +SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
> +BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW instruction set support.
> +
>  @item atom
>  Intel Atom CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3
>  instruction set support.
> --
> 1.8.3.1
>

On Thu, Dec 19, 2013 at 05:11:07PM +0400, Ilya Tocar wrote:
> This patch adds march for broadwell cpu.
> -march=bdw is the same as -march=core-avx2  but with support for rdseed,
> adcx, prefetchw. OK for trunk?

Why not -march=broadwell instead?

	Jakub

On Thu, Dec 19, 2013 at 5:18 AM, Jakub Jelinek <jakub@redhat.com> wrote:
> On Thu, Dec 19, 2013 at 05:11:07PM +0400, Ilya Tocar wrote:
>> This patch adds march for broadwell cpu.
>> -march=bdw is the same as -march=core-avx2  but with support for rdseed,
>> adcx, prefetchw. OK for trunk?
>
> Why not -march=broadwell instead?
>

If people don't mind long names, "broadwell" works for me.

H.J.