| Message ID | 1363943551-31150-1-git-send-email-lig.fnst@cn.fujitsu.com |
|---|---|
| State | New |
| Headers | show |
Il 22/03/2013 10:12, liguang ha scritto: > e.g. > $qemu-system-x86_64 -device port92 > will report segment fault, > for port92_write try a un-allocated > assignment for a20_out. > so check before this assignment. > > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > --- > hw/i386/pc.c | 3 ++- > 1 files changed, 2 insertions(+), 1 deletions(-) > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index ed7d9ba..a0e8ee0 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, > > DPRINTF("port92: write 0x%02x\n", val); > s->outport = val; > - qemu_set_irq(*s->a20_out, (val >> 1) & 1); > + if (s->a20_out) > + qemu_set_irq(*s->a20_out, (val >> 1) & 1); > if (val & 1) { > qemu_system_reset_request(); > } > Unfortunately, this is a very common problem. The correct fix is to change port92 to use the GPIO mechanism instead. Paolo
Am 22.03.2013 10:12, schrieb liguang: > e.g. > $qemu-system-x86_64 -device port92 > will report segment fault, > for port92_write try a un-allocated > assignment for a20_out. > so check before this assignment. > > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > --- > hw/i386/pc.c | 3 ++- > 1 files changed, 2 insertions(+), 1 deletions(-) > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index ed7d9ba..a0e8ee0 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, > > DPRINTF("port92: write 0x%02x\n", val); > s->outport = val; > - qemu_set_irq(*s->a20_out, (val >> 1) & 1); > + if (s->a20_out) > + qemu_set_irq(*s->a20_out, (val >> 1) & 1); Missing braces. But I think it would be better to proceed with my QOM'ification [1] and return an Error on realize here since these IRQs don't change while realized and qdev init doesn't allow to return a textual error. Andreas [1] https://github.com/afaerber/qemu-cpu/commits/realize-isa > if (val & 1) { > qemu_system_reset_request(); > } >
在 2013-03-22五的 12:20 +0100，Andreas Färber写道： > Am 22.03.2013 10:12, schrieb liguang: > > e.g. > > $qemu-system-x86_64 -device port92 > > will report segment fault, > > for port92_write try a un-allocated > > assignment for a20_out. > > so check before this assignment. > > > > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > > --- > > hw/i386/pc.c | 3 ++- > > 1 files changed, 2 insertions(+), 1 deletions(-) > > > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > > index ed7d9ba..a0e8ee0 100644 > > --- a/hw/i386/pc.c > > +++ b/hw/i386/pc.c > > @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, > > > > DPRINTF("port92: write 0x%02x\n", val); > > s->outport = val; > > - qemu_set_irq(*s->a20_out, (val >> 1) & 1); > > + if (s->a20_out) > > + qemu_set_irq(*s->a20_out, (val >> 1) & 1); > > Missing braces. Yes, Thanks! > > But I think it would be better to proceed with my QOM'ification [1] and > return an Error on realize here since these IRQs don't change while > realized and qdev init doesn't allow to return a textual error. > > Andreas > > [1] https://github.com/afaerber/qemu-cpu/commits/realize-isa > > > if (val & 1) { > > qemu_system_reset_request(); > > } > > > >
在 2013-03-22五的 12:07 +0100，Paolo Bonzini写道： > Il 22/03/2013 10:12, liguang ha scritto: > > e.g. > > $qemu-system-x86_64 -device port92 > > will report segment fault, > > for port92_write try a un-allocated > > assignment for a20_out. > > so check before this assignment. > > > > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> > > --- > > hw/i386/pc.c | 3 ++- > > 1 files changed, 2 insertions(+), 1 deletions(-) > > > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > > index ed7d9ba..a0e8ee0 100644 > > --- a/hw/i386/pc.c > > +++ b/hw/i386/pc.c > > @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, > > > > DPRINTF("port92: write 0x%02x\n", val); > > s->outport = val; > > - qemu_set_irq(*s->a20_out, (val >> 1) & 1); > > + if (s->a20_out) > > + qemu_set_irq(*s->a20_out, (val >> 1) & 1); > > if (val & 1) { > > qemu_system_reset_request(); > > } > > > > Unfortunately, this is a very common problem. The correct fix is to > change port92 to use the GPIO mechanism instead. > Sorry, Paolo, I'm not so familiar with 'GPIO mechanism', can you specify more? Thanks!
diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ed7d9ba..a0e8ee0 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val, DPRINTF("port92: write 0x%02x\n", val); s->outport = val; - qemu_set_irq(*s->a20_out, (val >> 1) & 1); + if (s->a20_out) + qemu_set_irq(*s->a20_out, (val >> 1) & 1); if (val & 1) { qemu_system_reset_request(); }
e.g. $qemu-system-x86_64 -device port92 will report segment fault, for port92_write try a un-allocated assignment for a20_out. so check before this assignment. Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> --- hw/i386/pc.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)