| Message ID | 000001cdf457$23711cc0$6a535640$@ye@arm.com |
|---|---|
| State | New |
| Headers | show |
On 01/16/2013 06:05 PM, Joey Ye wrote: > Test cases for previous patch "no lr save for non-far branches in leaf > function". > > * gcc.target/arm/thumb1-far-jump-1.c: New. > * gcc.target/arm/thumb1-far-jump-2.c: New. > > Index: gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c > =================================================================== > --- gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c (revision 0) > +++ gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c (revision 0) > @@ -0,0 +1,58 @@ > +/* Check for thumb1 far jump. This is the extreme case that far jump > + * will be used with minimum number of instructions. By passing this case > + * it means the heuristic of saving lr for far jump meets the most extreme > + * requirement. */ > +/* { dg-require-effective-target arm_thumb1_ok } */ > +/* { dg-options "-Os" } */ > +/* { dg-skip-if "" { ! { arm_thumb1 } } } */ The effective target arm_thumb1_ok returns 1 if it's OK to add -mthumb to the current multilib flags and together they generate code for Thumb-1. arm_thumb1 says that the current multilib flags generate code for Thumb-1. If you want to add -mthumb to the test then use: /* { dg-require-effective-target arm_thumb1_ok } */ /* { dg-options "-Os -mthumb" } */ Otherwise use /* { dg-skip-if "" { ! arm_thumb1 } } */ /* { dg-options "-Os" } */ > +/* { dg-final { scan-assembler "push.*lr" } } */ > Index: gcc/testsuite/gcc.target/arm/thumb1-far-jump-1.c > =================================================================== > --- gcc/testsuite/gcc.target/arm/thumb1-far-jump-1.c (revision 0) > +++ gcc/testsuite/gcc.target/arm/thumb1-far-jump-1.c (revision 0) > @@ -0,0 +1,35 @@ > +/* Check for thumb1 far jump. Shouldn't save lr for small leaf functions > + * even with a branch in it. */ > +/* { dg-require-effective-target arm_thumb1_ok } */ > +/* { dg-options "-Os" } */ > +/* { dg-skip-if "" { ! { arm_thumb1 } } } */ Same here. The tests are OK with those changes, but please wait a day or two for other comments or a clear OK from an ARM maintainer. Janis
Index: gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c =================================================================== --- gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c (revision 0) +++ gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c (revision 0) @@ -0,0 +1,58 @@ +/* Check for thumb1 far jump. This is the extreme case that far jump + * will be used with minimum number of instructions. By passing this case + * it means the heuristic of saving lr for far jump meets the most extreme + * requirement. */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-options "-Os" } */ +/* { dg-skip-if "" { ! { arm_thumb1 } } } */ + +volatile register r4 asm("r4"); +void f3(int i) +{ +#define GO(n) \ + extern volatile int g_##n; \ + r4=(int)&g_##n; + +#define GO8(n) \ + GO(n##_0) \ + GO(n##_1) \ + GO(n##_2) \ + GO(n##_3) \ + GO(n##_4) \ + GO(n##_5) \ + GO(n##_6) \ + GO(n##_7) + +#define GO64(n) \ + GO8(n##_0) \ + GO8(n##_1) \ + GO8(n##_2) \ + GO8(n##_3) \ + GO8(n##_4) \ + GO8(n##_5) \ + GO8(n##_6) \ + GO8(n##_7) \ + +#define GO498(n) \ + GO64(n##_0) \ + GO64(n##_1) \ + GO64(n##_2) \ + GO64(n##_3) \ + GO64(n##_4) \ + GO64(n##_5) \ + GO64(n##_6) \ + GO8(n##_0) \ + GO8(n##_1) \ + GO8(n##_2) \ + GO8(n##_3) \ + GO8(n##_4) \ + GO8(n##_5) \ + GO(n##_0) \ + GO(n##_1) \ + + if (i) { + GO498(0); + } +} + +/* { dg-final { scan-assembler "push.*lr" } } */ Index: gcc/testsuite/gcc.target/arm/thumb1-far-jump-1.c =================================================================== --- gcc/testsuite/gcc.target/arm/thumb1-far-jump-1.c (revision 0) +++ gcc/testsuite/gcc.target/arm/thumb1-far-jump-1.c (revision 0) @@ -0,0 +1,35 @@ +/* Check for thumb1 far jump. Shouldn't save lr for small leaf functions + * even with a branch in it. */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-options "-Os" } */ +/* { dg-skip-if "" { ! { arm_thumb1 } } } */ + +void f() +{ + for (;;); +} + +volatile int g; +void f2(int i) +{ + if (i) g=0; +} + +void f3(int i) +{ + if (i) { + g=0; + g=1; + g=2; + g=3; + g=4; + g=5; + g=6; + g=7; + g=8; + g=9; + } +} + +/* { dg-final { scan-assembler-not "push.*lr" } } */ +