diff mbox

[RFC,v4,08/44] target-unicore32: Rename to CPUUniCore32State

Message ID 1331346496-10736-9-git-send-email-afaerber@suse.de
State New
Headers show

Commit Message

Andreas Färber March 10, 2012, 2:27 a.m. UTC
This aids in refactoring CPUState by adopting the common naming scheme.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-unicore32/cpu.h |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

Comments

Anthony Liguori March 13, 2012, 6:05 p.m. UTC | #1
On 03/09/2012 08:27 PM, Andreas Färber wrote:
> This aids in refactoring CPUState by adopting the common naming scheme.
>
> Signed-off-by: Andreas Färber<afaerber@suse.de>

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>

Regards,

Anthony Liguori

> ---
>   target-unicore32/cpu.h |    8 ++++----
>   1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
> index f725634..923db05 100644
> --- a/target-unicore32/cpu.h
> +++ b/target-unicore32/cpu.h
> @@ -18,7 +18,7 @@
>
>   #define ELF_MACHINE             EM_UNICORE32
>
> -#define CPUState                struct CPUState_UniCore32
> +#define CPUState                struct CPUUniCore32State
>
>   #include "config.h"
>   #include "qemu-common.h"
> @@ -27,7 +27,7 @@
>
>   #define NB_MMU_MODES            2
>
> -typedef struct CPUState_UniCore32 {
> +typedef struct CPUUniCore32State {
>       /* Regs for current mode.  */
>       uint32_t regs[32];
>       /* Frequently accessed ASR bits are stored separately for efficiently.
> @@ -71,7 +71,7 @@ typedef struct CPUState_UniCore32 {
>       /* Internal CPU feature flags.  */
>       uint32_t features;
>
> -} CPUState_UniCore32;
> +} CPUUniCore32State;
>
>   #define ASR_M                   (0x1f)
>   #define ASR_MODE_USER           (0x10)
> @@ -179,7 +179,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
>
>   void uc32_translate_init(void);
>   void do_interrupt(CPUState *);
> -void switch_mode(CPUState_UniCore32 *, int);
> +void switch_mode(CPUUniCore32State *, int);
>
>   static inline bool cpu_has_work(CPUState *env)
>   {
diff mbox

Patch

diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index f725634..923db05 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -18,7 +18,7 @@ 
 
 #define ELF_MACHINE             EM_UNICORE32
 
-#define CPUState                struct CPUState_UniCore32
+#define CPUState                struct CPUUniCore32State
 
 #include "config.h"
 #include "qemu-common.h"
@@ -27,7 +27,7 @@ 
 
 #define NB_MMU_MODES            2
 
-typedef struct CPUState_UniCore32 {
+typedef struct CPUUniCore32State {
     /* Regs for current mode.  */
     uint32_t regs[32];
     /* Frequently accessed ASR bits are stored separately for efficiently.
@@ -71,7 +71,7 @@  typedef struct CPUState_UniCore32 {
     /* Internal CPU feature flags.  */
     uint32_t features;
 
-} CPUState_UniCore32;
+} CPUUniCore32State;
 
 #define ASR_M                   (0x1f)
 #define ASR_MODE_USER           (0x10)
@@ -179,7 +179,7 @@  static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
 
 void uc32_translate_init(void);
 void do_interrupt(CPUState *);
-void switch_mode(CPUState_UniCore32 *, int);
+void switch_mode(CPUUniCore32State *, int);
 
 static inline bool cpu_has_work(CPUState *env)
 {