| Message ID | 1327119330-29304-7-git-send-email-agraf@suse.de |
|---|---|
| State | New |
| Headers | show |
On 01/20/2012 10:15 PM, Alexander Graf wrote: > +/* returns bitmap of supported page sizes for a given TLB */ > +static inline uint32_t booke206_tlbnps(CPUState *env, const int tlbn) > +{ > + bool mav2 = false; > + uint32_t ret = 0; > + > + if (mav2) { > + ret = env->spr[SPR_BOOKE_TLB0PS + tlbn]; > + } else { > + uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn]; > + uint32_t min = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT; > + uint32_t max = (tlbncfg & TLBnCFG_MAXSIZE) >> TLBnCFG_MAXSIZE_SHIFT; > + int i; > + for (i = min; i <= max; i++) { > + ret |= (1 << (i << 1)); > + } > + } For mav1 only the even sizes are supported. -Scott
On 01/23/2012 06:29 PM, Scott Wood wrote: > On 01/20/2012 10:15 PM, Alexander Graf wrote: >> +/* returns bitmap of supported page sizes for a given TLB */ >> +static inline uint32_t booke206_tlbnps(CPUState *env, const int tlbn) >> +{ >> + bool mav2 = false; >> + uint32_t ret = 0; >> + >> + if (mav2) { >> + ret = env->spr[SPR_BOOKE_TLB0PS + tlbn]; >> + } else { >> + uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn]; >> + uint32_t min = (tlbncfg& TLBnCFG_MINSIZE)>> TLBnCFG_MINSIZE_SHIFT; >> + uint32_t max = (tlbncfg& TLBnCFG_MAXSIZE)>> TLBnCFG_MAXSIZE_SHIFT; >> + int i; >> + for (i = min; i<= max; i++) { >> + ret |= (1<< (i<< 1)); >> + } >> + } > For mav1 only the even sizes are supported. Yes, which is why min and max are >> 1 compared to the MAV2 values. Alex
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 6f4cdde..1026254 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1355,6 +1355,10 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) #define SPR_BOOKE_DVC2 (0x13F) #define SPR_BOOKE_TSR (0x150) #define SPR_BOOKE_TCR (0x154) +#define SPR_BOOKE_TLB0PS (0x158) +#define SPR_BOOKE_TLB1PS (0x159) +#define SPR_BOOKE_TLB2PS (0x15A) +#define SPR_BOOKE_TLB3PS (0x15B) #define SPR_BOOKE_IVOR0 (0x190) #define SPR_BOOKE_IVOR1 (0x191) #define SPR_BOOKE_IVOR2 (0x192) @@ -2116,6 +2120,27 @@ static inline ppcmas_tlb_t *booke206_get_tlbm(CPUState *env, const int tlbn, return &env->tlb.tlbm[r]; } +/* returns bitmap of supported page sizes for a given TLB */ +static inline uint32_t booke206_tlbnps(CPUState *env, const int tlbn) +{ + bool mav2 = false; + uint32_t ret = 0; + + if (mav2) { + ret = env->spr[SPR_BOOKE_TLB0PS + tlbn]; + } else { + uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn]; + uint32_t min = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT; + uint32_t max = (tlbncfg & TLBnCFG_MAXSIZE) >> TLBnCFG_MAXSIZE_SHIFT; + int i; + for (i = min; i <= max; i++) { + ret |= (1 << (i << 1)); + } + } + + return ret; +} + #endif extern void (*cpu_ppc_hypercall)(CPUState *);
When using MAV 2.0 TLB registers, we have another range of TLB registers available to read the supported page sizes from. Add SPR definitions for those and add a helper function that we can use to receive such a bitmap even when using MAV 1.0. Signed-off-by: Alexander Graf <agraf@suse.de> --- target-ppc/cpu.h | 25 +++++++++++++++++++++++++ 1 files changed, 25 insertions(+), 0 deletions(-)