diff mbox series

gpio: gpio-amd-fch: Fix typo on define of AMD_FCH_GPIO_REG_GPIO55_DEVSLP0

Message ID 20200920203207.25696-1-lists@wildgooses.com
State New
Headers show
Series gpio: gpio-amd-fch: Fix typo on define of AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 | expand

Commit Message

Ed W Sept. 20, 2020, 8:32 p.m. UTC
Schematics show that the GPIO number is 55 (not 59). Trivial typo.

Signed-off-by: Ed Wildgoose <lists@wildgooses.com>
---
 drivers/platform/x86/pcengines-apuv2.c          | 2 +-
 include/linux/platform_data/gpio/gpio-amd-fch.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Comments

Andy Shevchenko Sept. 21, 2020, 7:55 a.m. UTC | #1
On Sun, Sep 20, 2020 at 11:33 PM Ed Wildgoose <lists@wildgooses.com> wrote:
>
> Schematics show that the GPIO number is 55 (not 59). Trivial typo.

Does it still DEVSLP0? Perhaps you need to drop that part as well.

...

>  #define APU2_GPIO_REG_LED3             AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
>  #define APU2_GPIO_REG_MODESW           AMD_FCH_GPIO_REG_GPIO32_GE1
>  #define APU2_GPIO_REG_SIMSWAP          AMD_FCH_GPIO_REG_GPIO33_GE2
> -#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
> +#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
>  #define APU2_GPIO_REG_MPCIE3           AMD_FCH_GPIO_REG_GPIO51
>
>  /* Order in which the GPIO lines are defined in the register list */
> diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h b/include/linux/platform_data/gpio/gpio-amd-fch.h
> index 9e46678ed..255d51c9d 100644
> --- a/include/linux/platform_data/gpio/gpio-amd-fch.h
> +++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
> @@ -19,7 +19,7 @@
>  #define AMD_FCH_GPIO_REG_GPIO49                0x40
>  #define AMD_FCH_GPIO_REG_GPIO50                0x41
>  #define AMD_FCH_GPIO_REG_GPIO51                0x42
> -#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0        0x43
> +#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0        0x43
>  #define AMD_FCH_GPIO_REG_GPIO57                0x44
>  #define AMD_FCH_GPIO_REG_GPIO58                0x45
>  #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1        0x46
Ed W Sept. 21, 2020, 8:40 a.m. UTC | #2
On 21/09/2020 08:55, Andy Shevchenko wrote:
> On Sun, Sep 20, 2020 at 11:33 PM Ed Wildgoose <lists@wildgooses.com> wrote:
>> Schematics show that the GPIO number is 55 (not 59). Trivial typo.
> Does it still DEVSLP0? Perhaps you need to drop that part as well.
>
> ...


In the PCEngines schematic it's labelled as "G55/DEVSLP" (no 0)

(In contrast G59 is labelled "G59/DEVSLP1")

What is the quorum opinion on name?

Thanks

Ed W


>
>>   #define APU2_GPIO_REG_LED3             AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
>>   #define APU2_GPIO_REG_MODESW           AMD_FCH_GPIO_REG_GPIO32_GE1
>>   #define APU2_GPIO_REG_SIMSWAP          AMD_FCH_GPIO_REG_GPIO33_GE2
>> -#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
>> +#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
>>   #define APU2_GPIO_REG_MPCIE3           AMD_FCH_GPIO_REG_GPIO51
>>
>>   /* Order in which the GPIO lines are defined in the register list */
>> diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h b/include/linux/platform_data/gpio/gpio-amd-fch.h
>> index 9e46678ed..255d51c9d 100644
>> --- a/include/linux/platform_data/gpio/gpio-amd-fch.h
>> +++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
>> @@ -19,7 +19,7 @@
>>   #define AMD_FCH_GPIO_REG_GPIO49                0x40
>>   #define AMD_FCH_GPIO_REG_GPIO50                0x41
>>   #define AMD_FCH_GPIO_REG_GPIO51                0x42
>> -#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0        0x43
>> +#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0        0x43
>>   #define AMD_FCH_GPIO_REG_GPIO57                0x44
>>   #define AMD_FCH_GPIO_REG_GPIO58                0x45
>>   #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1        0x46
>
Ed W Sept. 28, 2020, 10:33 a.m. UTC | #3
Hi

Could I get a final opinion (or signoff) on this patch please?

The significant typo is the reference to "59", when the GPIO is actually 55

According to the PCEngines schematic the names of two similar GPIOs are
    G59/DEVSLP1
    G55/DEVSLP

The original developer named the second GPIO with a trailing 0, which doesn't seem unreasonable,
hence I just corrected the name to:
    AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
However another acceptable name could be:
    AMD_FCH_GPIO_REG_GPIO55_DEVSLP

If I could ask for some guidance and if necessary I will resubmit this patch? Enrico, do you have an
opinion?

However, perhaps it's already acceptable as is?

Kind regards

Ed W


On 21/09/2020 09:40, Ed W wrote:
> On 21/09/2020 08:55, Andy Shevchenko wrote:
>> On Sun, Sep 20, 2020 at 11:33 PM Ed Wildgoose <lists@wildgooses.com> wrote:
>>> Schematics show that the GPIO number is 55 (not 59). Trivial typo.
>> Does it still DEVSLP0? Perhaps you need to drop that part as well.
>>
>> ...
>
>
> In the PCEngines schematic it's labelled as "G55/DEVSLP" (no 0)
>
> (In contrast G59 is labelled "G59/DEVSLP1")
>
> What is the quorum opinion on name?
>
> Thanks
>
> Ed W
>
>
>>
>>>   #define APU2_GPIO_REG_LED3             AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
>>>   #define APU2_GPIO_REG_MODESW           AMD_FCH_GPIO_REG_GPIO32_GE1
>>>   #define APU2_GPIO_REG_SIMSWAP          AMD_FCH_GPIO_REG_GPIO33_GE2
>>> -#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
>>> +#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
>>>   #define APU2_GPIO_REG_MPCIE3           AMD_FCH_GPIO_REG_GPIO51
>>>
>>>   /* Order in which the GPIO lines are defined in the register list */
>>> diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h
>>> b/include/linux/platform_data/gpio/gpio-amd-fch.h
>>> index 9e46678ed..255d51c9d 100644
>>> --- a/include/linux/platform_data/gpio/gpio-amd-fch.h
>>> +++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
>>> @@ -19,7 +19,7 @@
>>>   #define AMD_FCH_GPIO_REG_GPIO49                0x40
>>>   #define AMD_FCH_GPIO_REG_GPIO50                0x41
>>>   #define AMD_FCH_GPIO_REG_GPIO51                0x42
>>> -#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0        0x43
>>> +#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0        0x43
>>>   #define AMD_FCH_GPIO_REG_GPIO57                0x44
>>>   #define AMD_FCH_GPIO_REG_GPIO58                0x45
>>>   #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1        0x46
>>
>
Andy Shevchenko Sept. 28, 2020, 11:45 a.m. UTC | #4
On Mon, Sep 28, 2020 at 1:33 PM Ed W <lists@wildgooses.com> wrote:
>
> Hi
>
> Could I get a final opinion (or signoff) on this patch please?
>
> The significant typo is the reference to "59", when the GPIO is actually 55
>
> According to the PCEngines schematic the names of two similar GPIOs are
>     G59/DEVSLP1
>     G55/DEVSLP
>
> The original developer named the second GPIO with a trailing 0, which doesn't seem unreasonable,
> hence I just corrected the name to:
>     AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
> However another acceptable name could be:
>     AMD_FCH_GPIO_REG_GPIO55_DEVSLP
>
> If I could ask for some guidance and if necessary I will resubmit this patch? Enrico, do you have an
> opinion?
>
> However, perhaps it's already acceptable as is?

It's being accepted, and will be sent later to Linus.

>
> Kind regards
>
> Ed W
>
>
> On 21/09/2020 09:40, Ed W wrote:
> > On 21/09/2020 08:55, Andy Shevchenko wrote:
> >> On Sun, Sep 20, 2020 at 11:33 PM Ed Wildgoose <lists@wildgooses.com> wrote:
> >>> Schematics show that the GPIO number is 55 (not 59). Trivial typo.
> >> Does it still DEVSLP0? Perhaps you need to drop that part as well.
> >>
> >> ...
> >
> >
> > In the PCEngines schematic it's labelled as "G55/DEVSLP" (no 0)
> >
> > (In contrast G59 is labelled "G59/DEVSLP1")
> >
> > What is the quorum opinion on name?
> >
> > Thanks
> >
> > Ed W
> >
> >
> >>
> >>>   #define APU2_GPIO_REG_LED3             AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
> >>>   #define APU2_GPIO_REG_MODESW           AMD_FCH_GPIO_REG_GPIO32_GE1
> >>>   #define APU2_GPIO_REG_SIMSWAP          AMD_FCH_GPIO_REG_GPIO33_GE2
> >>> -#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
> >>> +#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
> >>>   #define APU2_GPIO_REG_MPCIE3           AMD_FCH_GPIO_REG_GPIO51
> >>>
> >>>   /* Order in which the GPIO lines are defined in the register list */
> >>> diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> b/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> index 9e46678ed..255d51c9d 100644
> >>> --- a/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> +++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
> >>> @@ -19,7 +19,7 @@
> >>>   #define AMD_FCH_GPIO_REG_GPIO49                0x40
> >>>   #define AMD_FCH_GPIO_REG_GPIO50                0x41
> >>>   #define AMD_FCH_GPIO_REG_GPIO51                0x42
> >>> -#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0        0x43
> >>> +#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0        0x43
> >>>   #define AMD_FCH_GPIO_REG_GPIO57                0x44
> >>>   #define AMD_FCH_GPIO_REG_GPIO58                0x45
> >>>   #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1        0x46
> >>
> >
>
Enrico Weigelt, metux IT consult Oct. 12, 2020, 7:58 p.m. UTC | #5
Acked-by: Enrico Weigelt <info@metux.net>


--mtx

On 28.09.20 13:45, Andy Shevchenko wrote:
> On Mon, Sep 28, 2020 at 1:33 PM Ed W <lists@wildgooses.com> wrote:
>>
>> Hi
>>
>> Could I get a final opinion (or signoff) on this patch please?
>>
>> The significant typo is the reference to "59", when the GPIO is actually 55
>>
>> According to the PCEngines schematic the names of two similar GPIOs are
>>     G59/DEVSLP1
>>     G55/DEVSLP
>>
>> The original developer named the second GPIO with a trailing 0, which doesn't seem unreasonable,
>> hence I just corrected the name to:
>>     AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
>> However another acceptable name could be:
>>     AMD_FCH_GPIO_REG_GPIO55_DEVSLP
>>
>> If I could ask for some guidance and if necessary I will resubmit this patch? Enrico, do you have an
>> opinion?
>>
>> However, perhaps it's already acceptable as is?
> 
> It's being accepted, and will be sent later to Linus.
> 
>>
>> Kind regards
>>
>> Ed W
>>
>>
>> On 21/09/2020 09:40, Ed W wrote:
>>> On 21/09/2020 08:55, Andy Shevchenko wrote:
>>>> On Sun, Sep 20, 2020 at 11:33 PM Ed Wildgoose <lists@wildgooses.com> wrote:
>>>>> Schematics show that the GPIO number is 55 (not 59). Trivial typo.
>>>> Does it still DEVSLP0? Perhaps you need to drop that part as well.
>>>>
>>>> ...
>>>
>>>
>>> In the PCEngines schematic it's labelled as "G55/DEVSLP" (no 0)
>>>
>>> (In contrast G59 is labelled "G59/DEVSLP1")
>>>
>>> What is the quorum opinion on name?
>>>
>>> Thanks
>>>
>>> Ed W
>>>
>>>
>>>>
>>>>>   #define APU2_GPIO_REG_LED3             AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
>>>>>   #define APU2_GPIO_REG_MODESW           AMD_FCH_GPIO_REG_GPIO32_GE1
>>>>>   #define APU2_GPIO_REG_SIMSWAP          AMD_FCH_GPIO_REG_GPIO33_GE2
>>>>> -#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
>>>>> +#define APU2_GPIO_REG_MPCIE2           AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
>>>>>   #define APU2_GPIO_REG_MPCIE3           AMD_FCH_GPIO_REG_GPIO51
>>>>>
>>>>>   /* Order in which the GPIO lines are defined in the register list */
>>>>> diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h
>>>>> b/include/linux/platform_data/gpio/gpio-amd-fch.h
>>>>> index 9e46678ed..255d51c9d 100644
>>>>> --- a/include/linux/platform_data/gpio/gpio-amd-fch.h
>>>>> +++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
>>>>> @@ -19,7 +19,7 @@
>>>>>   #define AMD_FCH_GPIO_REG_GPIO49                0x40
>>>>>   #define AMD_FCH_GPIO_REG_GPIO50                0x41
>>>>>   #define AMD_FCH_GPIO_REG_GPIO51                0x42
>>>>> -#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0        0x43
>>>>> +#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0        0x43
>>>>>   #define AMD_FCH_GPIO_REG_GPIO57                0x44
>>>>>   #define AMD_FCH_GPIO_REG_GPIO58                0x45
>>>>>   #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1        0x46
>>>>
>>>
>>
> 
>
diff mbox series

Patch

diff --git a/drivers/platform/x86/pcengines-apuv2.c b/drivers/platform/x86/pcengines-apuv2.c
index 6aff6cf41..c37349f97 100644
--- a/drivers/platform/x86/pcengines-apuv2.c
+++ b/drivers/platform/x86/pcengines-apuv2.c
@@ -32,7 +32,7 @@ 
 #define APU2_GPIO_REG_LED3		AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
 #define APU2_GPIO_REG_MODESW		AMD_FCH_GPIO_REG_GPIO32_GE1
 #define APU2_GPIO_REG_SIMSWAP		AMD_FCH_GPIO_REG_GPIO33_GE2
-#define APU2_GPIO_REG_MPCIE2		AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
+#define APU2_GPIO_REG_MPCIE2		AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
 #define APU2_GPIO_REG_MPCIE3		AMD_FCH_GPIO_REG_GPIO51
 
 /* Order in which the GPIO lines are defined in the register list */
diff --git a/include/linux/platform_data/gpio/gpio-amd-fch.h b/include/linux/platform_data/gpio/gpio-amd-fch.h
index 9e46678ed..255d51c9d 100644
--- a/include/linux/platform_data/gpio/gpio-amd-fch.h
+++ b/include/linux/platform_data/gpio/gpio-amd-fch.h
@@ -19,7 +19,7 @@ 
 #define AMD_FCH_GPIO_REG_GPIO49		0x40
 #define AMD_FCH_GPIO_REG_GPIO50		0x41
 #define AMD_FCH_GPIO_REG_GPIO51		0x42
-#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0	0x43
+#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0	0x43
 #define AMD_FCH_GPIO_REG_GPIO57		0x44
 #define AMD_FCH_GPIO_REG_GPIO58		0x45
 #define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1	0x46