diff mbox series

[Arm] : MVE Don't use lsll for 32-bit shifts scalar

Message ID bb65410a-0b4d-d7d8-f909-97c87c8de4f5@arm.com
State New
Headers show
Series [Arm] : MVE Don't use lsll for 32-bit shifts scalar | expand

Commit Message

Andre Vieira (lists) April 7, 2020, 10:42 a.m. UTC
Hi,

After fixing the v[id]wdups using the "moving the wrap parameter" into 
the top-end of a DImode operand using a shift, I noticed we were using 
lsll for 32-bit shifts in scalars, where we don't need to, as we can 
simply do a move, which is much better if we don't need to use the 
bottom part.

We can solve this in a better way, but for now this will do.

Regression tested on arm-none-eabi.

Is this OK for trunk?

2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

         * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit
         shifts.

Comments

Kyrylo Tkachov April 7, 2020, 2:06 p.m. UTC | #1
> -----Original Message-----
> From: Andre Vieira (lists) <andre.simoesdiasvieira@arm.com>
> Sent: 07 April 2020 11:43
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
> Subject: [PATCH][GCC][Arm]: MVE Don't use lsll for 32-bit shifts scalar
> 
> Hi,
> 
> After fixing the v[id]wdups using the "moving the wrap parameter" into
> the top-end of a DImode operand using a shift, I noticed we were using
> lsll for 32-bit shifts in scalars, where we don't need to, as we can
> simply do a move, which is much better if we don't need to use the
> bottom part.
> 
> We can solve this in a better way, but for now this will do.
> 
> Regression tested on arm-none-eabi.
> 
> Is this OK for trunk?

Ok.
Thanks,
Kyrill

> 
> 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
> 
>          * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit
>          shifts.
diff mbox series

Patch

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1a7ea0d701e5677965574d877d0fe4b2f5bc149f..6d5560398dae3d0ace0342b4907542d2a6865f70 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4422,7 +4422,8 @@  (define_expand "ashldi3"
         operands[2] = force_reg (SImode, operands[2]);
 
       /* Armv8.1-M Mainline double shifts are not expanded.  */
-      if (arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2])))
+      if (arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2]))
+	  && (REG_P (operands[2]) || INTVAL(operands[2]) != 32))
         {
 	  if (!reg_overlap_mentioned_p(operands[0], operands[1]))
 	    emit_insn (gen_movdi (operands[0], operands[1]));