diff mbox series

[v2,net-next] net: phylink: allow in-band AN for USXGMII

Message ID 20200118121915.7762-1-olteanv@gmail.com
State Accepted
Delegated to: David Miller
Headers show
Series [v2,net-next] net: phylink: allow in-band AN for USXGMII | expand

Commit Message

Vladimir Oltean Jan. 18, 2020, 12:19 p.m. UTC 
From: Alex Marginean <alexandru.marginean@nxp.com>

USXGMII supports passing link information in-band between PHY and MAC PCS,
add it to the list of protocols that support in-band AN mode.

Being a MAC-PHY protocol that can auto-negotiate link speeds up to 10
Gbps, we populate the initial supported mask with the entire spectrum of
link modes up to 10G that PHYLINK supports, and we let the driver reduce
that mask in its .phylink_validate method.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
Changes in v2:
- copied netdev list
- Reordered USXGMII with 10GKR

 drivers/net/phy/phylink.c | 1 +
 1 file changed, 1 insertion(+)

Comments

David Miller Jan. 20, 2020, 9:27 a.m. UTC | #1 
From: Vladimir Oltean <olteanv@gmail.com>
Date: Sat, 18 Jan 2020 14:19:15 +0200

> From: Alex Marginean <alexandru.marginean@nxp.com>
> 
> USXGMII supports passing link information in-band between PHY and MAC PCS,
> add it to the list of protocols that support in-band AN mode.
> 
> Being a MAC-PHY protocol that can auto-negotiate link speeds up to 10
> Gbps, we populate the initial supported mask with the entire spectrum of
> link modes up to 10G that PHYLINK supports, and we let the driver reduce
> that mask in its .phylink_validate method.
> 
> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> Changes in v2:
> - copied netdev list
> - Reordered USXGMII with 10GKR

Applied, thanks.
diff mbox series

Patch

diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index efabbfa4a6d3..40da85c70eba 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -298,6 +298,7 @@  static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
 			phylink_set(pl->supported, 2500baseX_Full);
 			break;
 
+		case PHY_INTERFACE_MODE_USXGMII:
 		case PHY_INTERFACE_MODE_10GKR:
 		case PHY_INTERFACE_MODE_10GBASER:
 			phylink_set(pl->supported, 10baseT_Half);