| Message ID | 201106061449.p56EnHo1021674@carson.cam.lispworks.com |
|---|---|
| State | New |
| Headers | show |
On Mon, Jun 06, 2011 at 03:49:17PM +0100, Martin Simmons wrote: > Hi, > > While trying to use qemu -cpu pentium3 to test for incorrect uses of certain > SSE2 instructions, I found that QEMU allowed the mfence and lfence > instructions to be executed even though Pentium 3 doesn't support them. > > According to the processor specs (and experience on a real Pentium 3), these > instructions are only available with SSE2, but QEMU is checking for SSE. The > check for the related sfence instruction is correct (it works with SSE). > > This trival patch fixes the test: > > Signed-off-by: Martin Simmons <martin@lispworks.com> Thanks, applied to the trivial patches tree: http://repo.or.cz/w/qemu/stefanha.git/shortlog/refs/heads/trivial-patches Stefan
--- a/target-i386/translate.c 2011-06-03 16:17:18.270208646 +0100 +++ b/target-i386/translate.c 2011-06-03 16:02:41.381556714 +0100 @@ -7560,7 +7560,7 @@ break; case 5: /* lfence */ case 6: /* mfence */ - if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE)) + if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2)) goto illegal_op; break; case 7: /* sfence / clflush */
Hi, While trying to use qemu -cpu pentium3 to test for incorrect uses of certain SSE2 instructions, I found that QEMU allowed the mfence and lfence instructions to be executed even though Pentium 3 doesn't support them. According to the processor specs (and experience on a real Pentium 3), these instructions are only available with SSE2, but QEMU is checking for SSE. The check for the related sfence instruction is correct (it works with SSE). This trival patch fixes the test: Signed-off-by: Martin Simmons <martin@lispworks.com> __Martin