Message ID | f91001d8c5f0cb2860fda720d0cb6298a4856dd3.1572926608.git.rahul.tanwar@linux.intel.com |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | pinctrl: Add new pinctrl/GPIO driver | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success | |
robh/dt-meta-schema | fail | build log |
On Tue, Nov 05, 2019 at 02:49:43PM +0800, Rahul Tanwar wrote: > Add dt bindings document for pinmux & GPIO controller driver of > Intel Lightning Mountain SoC. > > Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> > --- > .../bindings/pinctrl/intel,lgm-pinctrl.yaml | 114 +++++++++++++++++++++ > 1 file changed, 114 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml > new file mode 100644 > index 000000000000..961ac877a962 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml > @@ -0,0 +1,114 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/bindings/pinctrl/intel,lgm-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Lightning Mountain SoC pinmux & GPIO controller binding > + > +maintainers: > + - Rahul Tanwar <rahul.tanwar@linux.intel.com> > + > +description: | > + Pinmux & GPIO controller controls pin multiplexing & configuration including > + GPIO function selection & GPIO attributes configuration. > + > + Please refer to [1] for details of the common pinctrl bindings used by the > + client devices. > + > + [1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt > + > +properties: > + compatible: > + const: intel,lgm-pinctrl > + > + reg: > + maxItems: 1 > + > +# Client device subnode's properties > +patternProperties: > + "^.*@[0-9a-fA-F]+$": A unit address is wrong here. Please define some pattern we can match on. '-pins$' perhaps. > + type: object > + description: > + Pinctrl node's client devices use subnodes for desired pin configuration. > + Client device subnodes use below standard properties. > + > + properties: > + function: > + $ref: /schemas/types.yaml#/definitions/string > + description: > + A string containing the name of the function to mux to the group. > + > + groups: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + An array of strings identifying the list of groups. > + > + pins: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + description: > + List of pins to select with this function. > + > + pinmux: > + description: The applicable mux group. > + allOf: > + - $ref: "/schemas/types.yaml#/definitions/uint32" > + - enum: > + - 0 #PINMUX_GPIO > + - 1 > + - 2 > + - 3 > + - 4 > + > + bias-pull-up: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Specifies pull-up configuration. Isn't this boolean? > + > + bias-pull-down: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Specifies pull-down configuration. And this? Though looks like sometimes it has a value? Pull strength I guess. > + > + drive-strength: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Enables driver-current. > + > + slew-rate: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Enables slew-rate. > + > + drive-open-drain: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Specifies open-drain configuration. boolean? > + > + output-enable: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Specifies if the pin is to be configured as output. boolean? But really, all of these should have a common schema defining the types and only put any additional constraints here. > + > + > + required: > + - function > + - groups > + > +required: > + - compatible > + - reg additionalProperties: false > + > +examples: > + # Pinmux controller node > + - | > + pinctrl: pinctrl@e2880000 { > + compatible = "intel,lgm-pinctrl"; > + reg = <0xe2880000 0x100000>; > + > + # Client device subnode > + uart0:uart0 { space ^ > + pins = <64>, /* UART_RX0 */ > + <65>; /* UART_TX0 */ > + function = "CONSOLE_UART0"; > + pinmux = <1>, > + <1>; > + groups = "CONSOLE_UART0"; > + }; > + }; > + > +... > -- > 2.11.0 >
Hi Rob, Thanks for the feedback. On 6/11/2019 5:29 AM, Rob Herring wrote: >> + bias-pull-up: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: Specifies pull-up configuration. > Isn't this boolean? > >> + >> + bias-pull-down: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: Specifies pull-down configuration. > And this? > > Though looks like sometimes it has a value? Pull strength I guess. > >> + >> + drive-strength: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: Enables driver-current. >> + >> + slew-rate: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: Enables slew-rate. >> + >> + drive-open-drain: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: Specifies open-drain configuration. > boolean? > >> + >> + output-enable: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: Specifies if the pin is to be configured as output. > boolean? > > But really, all of these should have a common schema defining the types > and only put any additional constraints here. Yes, you are right. These are all boolean types. All these are standard properties & we are using them with no additional constraintsi.e conforming to how they are already documented in pinctrl-bindings.txt. Shall ijust omit documenting these properties here in driver bindings ? >> + >> +examples: >> + # Pinmux controller node >> + - | >> + pinctrl: pinctrl@e2880000 { >> + compatible = "intel,lgm-pinctrl"; >> + reg = <0xe2880000 0x100000>; >> + >> + # Client device subnode >> + uart0:uart0 { > space ^ Just to be sure, you mean space misalignment at below line <65>; /* UART_TX0 */ ?Or is it something else ? >> + pins = <64>, /* UART_RX0 */ >> + <65>; /* UART_TX0 */ >> + function = "CONSOLE_UART0"; >> + pinmux = <1>, >> + <1>; >> + groups = "CONSOLE_UART0"; >> + }; >> + }; >> + >> +... >> -- >> 2.11.0 >> Regards, Rahul
On 6/11/2019 6:24 PM, Tanwar, Rahul wrote: > Hi Rob, > > Thanks for the feedback. > > On 6/11/2019 5:29 AM, Rob Herring wrote: >>> + bias-pull-up: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: Specifies pull-up configuration. >> Isn't this boolean? >> >>> + >>> + bias-pull-down: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: Specifies pull-down configuration. >> And this? >> >> Though looks like sometimes it has a value? Pull strength I guess. >> >>> + >>> + drive-strength: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: Enables driver-current. >>> + >>> + slew-rate: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: Enables slew-rate. >>> + >>> + drive-open-drain: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: Specifies open-drain configuration. >> boolean? >> >>> + >>> + output-enable: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: Specifies if the pin is to be configured as output. >> boolean? >> >> But really, all of these should have a common schema defining the types >> and only put any additional constraints here. > Yes, you are right. These are all boolean types. > All these are standard properties & we are using them with no > additional constraintsi.e conforming to how they are already > documented in pinctrl-bindings.txt. Shall ijust omit documenting > these properties here in driver bindings ? > >>> + >>> +examples: >>> + # Pinmux controller node >>> + - | >>> + pinctrl: pinctrl@e2880000 { >>> + compatible = "intel,lgm-pinctrl"; >>> + reg = <0xe2880000 0x100000>; >>> + >>> + # Client device subnode >>> + uart0:uart0 { >> space ^ > Just to be sure, you mean space misalignment at below > line <65>; /* UART_TX0 */ ?Or is it something else ? Please ignore this query of mine. I now realize that you meant space between alias name & node name i.e. uart0: uart0 {. I will fix it in nextpatch version. Thanks. >>> + pins = <64>, /* UART_RX0 */ >>> + <65>; /* UART_TX0 */ >>> + function = "CONSOLE_UART0"; >>> + pinmux = <1>, >>> + <1>; >>> + groups = "CONSOLE_UART0"; >>> + }; >>> + }; >>> + >>> +... >>> -- >>> 2.11.0 >>> > Regards, > Rahul
diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml new file mode 100644 index 000000000000..961ac877a962 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/pinctrl/intel,lgm-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain SoC pinmux & GPIO controller binding + +maintainers: + - Rahul Tanwar <rahul.tanwar@linux.intel.com> + +description: | + Pinmux & GPIO controller controls pin multiplexing & configuration including + GPIO function selection & GPIO attributes configuration. + + Please refer to [1] for details of the common pinctrl bindings used by the + client devices. + + [1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt + +properties: + compatible: + const: intel,lgm-pinctrl + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + "^.*@[0-9a-fA-F]+$": + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + function: + $ref: /schemas/types.yaml#/definitions/string + description: + A string containing the name of the function to mux to the group. + + groups: + $ref: /schemas/types.yaml#/definitions/string-array + description: + An array of strings identifying the list of groups. + + pins: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + List of pins to select with this function. + + pinmux: + description: The applicable mux group. + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - enum: + - 0 #PINMUX_GPIO + - 1 + - 2 + - 3 + - 4 + + bias-pull-up: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specifies pull-up configuration. + + bias-pull-down: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specifies pull-down configuration. + + drive-strength: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Enables driver-current. + + slew-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Enables slew-rate. + + drive-open-drain: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specifies open-drain configuration. + + output-enable: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specifies if the pin is to be configured as output. + + + required: + - function + - groups + +required: + - compatible + - reg + +examples: + # Pinmux controller node + - | + pinctrl: pinctrl@e2880000 { + compatible = "intel,lgm-pinctrl"; + reg = <0xe2880000 0x100000>; + + # Client device subnode + uart0:uart0 { + pins = <64>, /* UART_RX0 */ + <65>; /* UART_TX0 */ + function = "CONSOLE_UART0"; + pinmux = <1>, + <1>; + groups = "CONSOLE_UART0"; + }; + }; + +...
Add dt bindings document for pinmux & GPIO controller driver of Intel Lightning Mountain SoC. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> --- .../bindings/pinctrl/intel,lgm-pinctrl.yaml | 114 +++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml