diff mbox series

libpdbg/p9chip: fix ram_is_setup

Message ID 20180808120055.32528-1-npiggin@gmail.com
State Accepted
Headers show
Series libpdbg/p9chip: fix ram_is_setup | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success master/apply_patch Successfully applied
snowpatch_ozlabs/build-multiarch success Test build-multiarch on branch master

Commit Message

Nicholas Piggin Aug. 8, 2018, noon UTC
Commit b825a47717 removed ram_is_setup unintentionally. Add it back.

Ramming still doesn't really work because special wakeup release
between stop and ram commands causes quiesced state to be lost.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 libpdbg/p9chip.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Alistair Popple Aug. 13, 2018, 5:22 a.m. UTC | #1
Whoops. Thanks Nick for picking that up.

- Alistair

On Wednesday, 8 August 2018 10:00:55 PM AEST Nicholas Piggin wrote:
> Commit b825a47717 removed ram_is_setup unintentionally. Add it back.
> 
> Ramming still doesn't really work because special wakeup release
> between stop and ram commands causes quiesced state to be lost.
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>  libpdbg/p9chip.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
> index c5de3bb..c43b0cc 100644
> --- a/libpdbg/p9chip.c
> +++ b/libpdbg/p9chip.c
> @@ -217,6 +217,9 @@ static int p9_ram_setup(struct thread *thread)
>  	struct core *chip = target_to_core(thread->target.parent);
>  	uint64_t value;
>  
> +	if (thread->ram_is_setup)
> +		return 1;
> +
>  	/* We can only ram a thread if all the threads on the core/chip are
>  	 * quiesced */
>  	dt_for_each_compatible(&chip->target, target, "ibm,power9-thread") {
> @@ -256,6 +259,8 @@ static int p9_ram_setup(struct thread *thread)
>  
>  	thread->status = p9_get_thread_status(thread);
>  
> +	thread->ram_is_setup = true;
> +
>  	return 0;
>  
>  out_fail:
> @@ -362,6 +367,9 @@ static int p9_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *
>  
>  static int p9_ram_destroy(struct thread *thread)
>  {
> +	if (!thread->ram_is_setup)
> +		return 1;
> +
>  	/* Disable ram mode */
>  	CHECK_ERR(thread_write(thread, P9_RAM_MODEREG, 0));
>  
> @@ -370,6 +378,8 @@ static int p9_ram_destroy(struct thread *thread)
>  
>  	thread->status = p9_get_thread_status(thread);
>  
> +	thread->ram_is_setup = false;
> +
>  	return 0;
>  }
>  
>
diff mbox series

Patch

diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
index c5de3bb..c43b0cc 100644
--- a/libpdbg/p9chip.c
+++ b/libpdbg/p9chip.c
@@ -217,6 +217,9 @@  static int p9_ram_setup(struct thread *thread)
 	struct core *chip = target_to_core(thread->target.parent);
 	uint64_t value;
 
+	if (thread->ram_is_setup)
+		return 1;
+
 	/* We can only ram a thread if all the threads on the core/chip are
 	 * quiesced */
 	dt_for_each_compatible(&chip->target, target, "ibm,power9-thread") {
@@ -256,6 +259,8 @@  static int p9_ram_setup(struct thread *thread)
 
 	thread->status = p9_get_thread_status(thread);
 
+	thread->ram_is_setup = true;
+
 	return 0;
 
 out_fail:
@@ -362,6 +367,9 @@  static int p9_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *
 
 static int p9_ram_destroy(struct thread *thread)
 {
+	if (!thread->ram_is_setup)
+		return 1;
+
 	/* Disable ram mode */
 	CHECK_ERR(thread_write(thread, P9_RAM_MODEREG, 0));
 
@@ -370,6 +378,8 @@  static int p9_ram_destroy(struct thread *thread)
 
 	thread->status = p9_get_thread_status(thread);
 
+	thread->ram_is_setup = false;
+
 	return 0;
 }