| Message ID | 1515778879-60075-4-git-send-email-bhanuprakash.bodireddy@intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Ian Stokes |
| Headers | show |
| Series | [ovs-dev,1/4] compiler: Introduce OVS_PREFETCH variants. | expand |
> -----Original Message----- > From: ovs-dev-bounces@openvswitch.org [mailto:ovs-dev- > bounces@openvswitch.org] On Behalf Of Bhanuprakash Bodireddy > Sent: Friday, January 12, 2018 5:41 PM > To: dev@openvswitch.org > Subject: [ovs-dev] [PATCH 4/4] doc: Update configure section with > prefetchwt1 details. > > Inspite of specifying -march=native when using Low Temporal > Write(OPCH_LTW), the compiler generates 'prefetchw' instruction instead of > 'prefetchwt1' > instruction available on processor as in 'Case B'. To make the compiler > emit > prefetchwt1 instruction, -mprefetchwt1 needs to be passed to configure > explicitly. > > [Problem] > Case A: > OVS_PREFETCH_CACHE(addr, OPCH_HTW) [__builtin_prefetch(addr, 1, 3)] > [Assembly] > leaq -112(%rbp), %rax > prefetchw (%rax) > > Case B: > OVS_PREFETCH_CACHE(addr, OPCH_LTW) [__builtin_prefetch(addr, 1, 1)] > [Assembly] > leaq -112(%rbp), %rax > prefetchw (%rax) <***problem***> > > [Solution] > ./configure CFLAGS="-g -O2 -mprefetchwt1" > > Case B: > OVS_PREFETCH_CACHE(addr, OPCH_LTW) [__builtin_prefetch(addr, 1, 1)] > [Assembly] > leaq -112(%rbp), %rax > prefetchwt1 (%rax) > > See also: > https://mail.openvswitch.org/pipermail/ovs-dev/2017-December/341591.html > > Signed-off-by: Bhanuprakash Bodireddy <bhanuprakash.bodireddy@intel.com> > --- > Documentation/intro/install/general.rst | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/intro/install/general.rst > b/Documentation/intro/install/general.rst > index 718e5c2..4d2db45 100644 > --- a/Documentation/intro/install/general.rst > +++ b/Documentation/intro/install/general.rst > @@ -280,6 +280,19 @@ With this, GCC will detect the processor and > automatically set appropriate flags for it. This should not be used if > you are compiling OVS outside the target machine. > > +Compilers(gcc) won't emit prefetchwt1 instruction even with '- > march=native' > +specified. In such case, -mprefetchwt1 needs to be explicitly passed > +during configuration. Is prefetchwt1 supported by other compilers (clang etc.)? > + > +For example inspite of specifying -march=native when using Low Temporal > +Write i.e OVS_PREFETCH_CACHE(addr, OPCH_LTW), the compiler generates > 'prefetchw' > +instruction instead of 'prefetchwt1' instruction available on processor. > + > +To make the compiler generate the appropriate instruction, it is > +recommended to pass ``-mprefetchwt1`` settings:: > + > + $ ./configure CFLAGS="-g -O2 -march=native -mprefetchwt1" In the comments for patch 1 of the series you mentioned users had to enable the instruction. It would be worth mentioning that here also. If there is extra work external to OVS to enable this instruction we can't assume the user will know this. > + > .. note:: > CFLAGS are not applied when building the Linux kernel module. Custom > CFLAGS > for the kernel module are supplied using the ``EXTRA_CFLAGS`` variable > when > -- > 2.4.11 > > _______________________________________________ > dev mailing list > dev@openvswitch.org > https://mail.openvswitch.org/mailman/listinfo/ovs-dev
>> -----Original Message----- >> From: ovs-dev-bounces@openvswitch.org [mailto:ovs-dev- >> bounces@openvswitch.org] On Behalf Of Bhanuprakash Bodireddy >> Sent: Friday, January 12, 2018 5:41 PM >> To: dev@openvswitch.org >> Subject: [ovs-dev] [PATCH 4/4] doc: Update configure section with >> prefetchwt1 details. >> >> Inspite of specifying -march=native when using Low Temporal >> Write(OPCH_LTW), the compiler generates 'prefetchw' instruction >> instead of 'prefetchwt1' >> instruction available on processor as in 'Case B'. To make the >> compiler emit >> prefetchwt1 instruction, -mprefetchwt1 needs to be passed to configure >> explicitly. >> >> [Problem] >> Case A: >> OVS_PREFETCH_CACHE(addr, OPCH_HTW) [__builtin_prefetch(addr, 1, >3)] >> [Assembly] >> leaq -112(%rbp), %rax >> prefetchw (%rax) >> >> Case B: >> OVS_PREFETCH_CACHE(addr, OPCH_LTW) [__builtin_prefetch(addr, 1, >1)] >> [Assembly] >> leaq -112(%rbp), %rax >> prefetchw (%rax) <***problem***> >> >> [Solution] >> ./configure CFLAGS="-g -O2 -mprefetchwt1" >> >> Case B: >> OVS_PREFETCH_CACHE(addr, OPCH_LTW) [__builtin_prefetch(addr, 1, >1)] >> [Assembly] >> leaq -112(%rbp), %rax >> prefetchwt1 (%rax) >> >> See also: >> https://mail.openvswitch.org/pipermail/ovs-dev/2017-December/341591.ht >> ml >> >> Signed-off-by: Bhanuprakash Bodireddy >> <bhanuprakash.bodireddy@intel.com> >> --- >> Documentation/intro/install/general.rst | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >> >> diff --git a/Documentation/intro/install/general.rst >> b/Documentation/intro/install/general.rst >> index 718e5c2..4d2db45 100644 >> --- a/Documentation/intro/install/general.rst >> +++ b/Documentation/intro/install/general.rst >> @@ -280,6 +280,19 @@ With this, GCC will detect the processor and >> automatically set appropriate flags for it. This should not be used >> if you are compiling OVS outside the target machine. >> >> +Compilers(gcc) won't emit prefetchwt1 instruction even with '- >> march=native' >> +specified. In such case, -mprefetchwt1 needs to be explicitly passed >> +during configuration. > >Is prefetchwt1 supported by other compilers (clang etc.)? [BHANU] I don't know if clang supports this instruction. But the below link has reference to this and the instruction may be supported. https://clang.llvm.org/docs/ClangCommandLineReference.html#cmdoption-clang-mprefetchwt1 > >> + >> +For example inspite of specifying -march=native when using Low >> +Temporal Write i.e OVS_PREFETCH_CACHE(addr, OPCH_LTW), the >compiler >> +generates >> 'prefetchw' >> +instruction instead of 'prefetchwt1' instruction available on processor. >> + >> +To make the compiler generate the appropriate instruction, it is >> +recommended to pass ``-mprefetchwt1`` settings:: >> + >> + $ ./configure CFLAGS="-g -O2 -march=native -mprefetchwt1" > >In the comments for patch 1 of the series you mentioned users had to enable >the instruction. >It would be worth mentioning that here also. If there is extra work external to >OVS to enable this instruction we can't assume the user will know this. [BHANU] what I meant by enabling the instruction in 1/4 patch was to use -mprefetchwt1 flag while configuring OvS. Regards, Bhanuprakash. > >> + >> .. note:: >> CFLAGS are not applied when building the Linux kernel module. >> Custom CFLAGS >> for the kernel module are supplied using the ``EXTRA_CFLAGS`` >> variable when >> -- >> 2.4.11 >> >> _______________________________________________ >> dev mailing list >> dev@openvswitch.org >> https://mail.openvswitch.org/mailman/listinfo/ovs-dev
diff --git a/Documentation/intro/install/general.rst b/Documentation/intro/install/general.rst index 718e5c2..4d2db45 100644 --- a/Documentation/intro/install/general.rst +++ b/Documentation/intro/install/general.rst @@ -280,6 +280,19 @@ With this, GCC will detect the processor and automatically set appropriate flags for it. This should not be used if you are compiling OVS outside the target machine. +Compilers(gcc) won't emit prefetchwt1 instruction even with '-march=native' +specified. In such case, -mprefetchwt1 needs to be explicitly passed during +configuration. + +For example inspite of specifying -march=native when using Low Temporal Write +i.e OVS_PREFETCH_CACHE(addr, OPCH_LTW), the compiler generates 'prefetchw' +instruction instead of 'prefetchwt1' instruction available on processor. + +To make the compiler generate the appropriate instruction, it is recommended +to pass ``-mprefetchwt1`` settings:: + + $ ./configure CFLAGS="-g -O2 -march=native -mprefetchwt1" + .. note:: CFLAGS are not applied when building the Linux kernel module. Custom CFLAGS for the kernel module are supplied using the ``EXTRA_CFLAGS`` variable when
Inspite of specifying -march=native when using Low Temporal Write(OPCH_LTW), the compiler generates 'prefetchw' instruction instead of 'prefetchwt1' instruction available on processor as in 'Case B'. To make the compiler emit prefetchwt1 instruction, -mprefetchwt1 needs to be passed to configure explicitly. [Problem] Case A: OVS_PREFETCH_CACHE(addr, OPCH_HTW) [__builtin_prefetch(addr, 1, 3)] [Assembly] leaq -112(%rbp), %rax prefetchw (%rax) Case B: OVS_PREFETCH_CACHE(addr, OPCH_LTW) [__builtin_prefetch(addr, 1, 1)] [Assembly] leaq -112(%rbp), %rax prefetchw (%rax) <***problem***> [Solution] ./configure CFLAGS="-g -O2 -mprefetchwt1" Case B: OVS_PREFETCH_CACHE(addr, OPCH_LTW) [__builtin_prefetch(addr, 1, 1)] [Assembly] leaq -112(%rbp), %rax prefetchwt1 (%rax) See also: https://mail.openvswitch.org/pipermail/ovs-dev/2017-December/341591.html Signed-off-by: Bhanuprakash Bodireddy <bhanuprakash.bodireddy@intel.com> --- Documentation/intro/install/general.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+)