| Message ID | 1518751105-17211-2-git-send-email-cota@braap.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] translator: pass max_insns to tb_start | expand |
On 02/15/2018 07:18 PM, Emilio G. Cota wrote: > sh4 will need it. > > Signed-off-by: Emilio G. Cota <cota@braap.org> > --- > accel/tcg/translator.c | 2 +- > include/exec/translator.h | 3 ++- > target/alpha/translate.c | 3 ++- > target/arm/translate-a64.c | 4 +++- > target/arm/translate.c | 4 +++- > target/hppa/translate.c | 4 +++- > target/i386/translate.c | 3 ++- > 7 files changed, 16 insertions(+), 7 deletions(-) There is another possibility, which is to move max_insns into DisasContextBase where it can be modified. This would allow the gusa sequence to be handled differently as an instance of the translate_insn hook, which would allow a breakpoint to be placed on the first insn of a gusa sequence. I guess I don't have strong feelings either way. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 02/19/2018 11:31 AM, Richard Henderson wrote: > On 02/15/2018 07:18 PM, Emilio G. Cota wrote: >> sh4 will need it. >> >> Signed-off-by: Emilio G. Cota <cota@braap.org> >> --- >> accel/tcg/translator.c | 2 +- >> include/exec/translator.h | 3 ++- >> target/alpha/translate.c | 3 ++- >> target/arm/translate-a64.c | 4 +++- >> target/arm/translate.c | 4 +++- >> target/hppa/translate.c | 4 +++- >> target/i386/translate.c | 3 ++- >> 7 files changed, 16 insertions(+), 7 deletions(-) > > There is another possibility, which is to move max_insns into DisasContextBase > where it can be modified. This would allow the gusa sequence to be handled > differently as an instance of the translate_insn hook, which would allow a > breakpoint to be placed on the first insn of a gusa sequence. > > I guess I don't have strong feelings either way. Thinking some more, I *do* prefer max_insns in DisasContextBase. For ARM SVE, implementing MOVPRFX, I would like to be able to tell if we intend to break the TB between MOVPRFX and the instruction being prefixed. I can't do that if the data is private to translator.c. r~
On Mon, Feb 19, 2018 at 11:34:52 -0800, Richard Henderson wrote: > On 02/19/2018 11:31 AM, Richard Henderson wrote: > > On 02/15/2018 07:18 PM, Emilio G. Cota wrote: > >> sh4 will need it. > >> > >> Signed-off-by: Emilio G. Cota <cota@braap.org> > >> --- > >> accel/tcg/translator.c | 2 +- > >> include/exec/translator.h | 3 ++- > >> target/alpha/translate.c | 3 ++- > >> target/arm/translate-a64.c | 4 +++- > >> target/arm/translate.c | 4 +++- > >> target/hppa/translate.c | 4 +++- > >> target/i386/translate.c | 3 ++- > >> 7 files changed, 16 insertions(+), 7 deletions(-) > > > > There is another possibility, which is to move max_insns into DisasContextBase > > where it can be modified. This would allow the gusa sequence to be handled > > differently as an instance of the translate_insn hook, which would allow a > > breakpoint to be placed on the first insn of a gusa sequence. > > > > I guess I don't have strong feelings either way. > > Thinking some more, I *do* prefer max_insns in DisasContextBase. > > For ARM SVE, implementing MOVPRFX, I would like to be able to tell if we intend > to break the TB between MOVPRFX and the instruction being prefixed. I can't do > that if the data is private to translator.c. Will move to DisasContextBase. Will also remove its passing to insn_disas_context, since base.max_insns will be accessible. Thanks, E.
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 23c6602..4ab6f8d 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -64,7 +64,7 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, /* Start translating. */ gen_tb_start(db->tb); - ops->tb_start(db, cpu); + max_insns = ops->tb_start(db, cpu, max_insns); tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ while (true) { diff --git a/include/exec/translator.h b/include/exec/translator.h index e2dc2a0..0182ada 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -81,6 +81,7 @@ typedef struct DisasContextBase { * @tb_start: * Emit any code required before the start of the main loop, * after the generic gen_tb_start(). + * Return max_insns, modified if necessary. * * @insn_start: * Emit the tcg_gen_insn_start opcode. @@ -108,7 +109,7 @@ typedef struct DisasContextBase { typedef struct TranslatorOps { int (*init_disas_context)(DisasContextBase *db, CPUState *cpu, int max_insns); - void (*tb_start)(DisasContextBase *db, CPUState *cpu); + int (*tb_start)(DisasContextBase *db, CPUState *cpu, int max_insns); void (*insn_start)(DisasContextBase *db, CPUState *cpu); bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu, const CPUBreakpoint *bp); diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 73a1b5e..b603dbd 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -2963,8 +2963,9 @@ static int alpha_tr_init_disas_context(DisasContextBase *dcbase, return MIN(max_insns, bound); } -static void alpha_tr_tb_start(DisasContextBase *db, CPUState *cpu) +static int alpha_tr_tb_start(DisasContextBase *db, CPUState *cpu, int max_insns) { + return max_insns; } static void alpha_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1c88539..7aa47ee 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -12080,9 +12080,11 @@ static int aarch64_tr_init_disas_context(DisasContextBase *dcbase, return max_insns; } -static void aarch64_tr_tb_start(DisasContextBase *db, CPUState *cpu) +static int aarch64_tr_tb_start(DisasContextBase *db, CPUState *cpu, + int max_insns) { tcg_clear_temp_count(); + return max_insns; } static void aarch64_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) diff --git a/target/arm/translate.c b/target/arm/translate.c index 1270022..bdee04e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -12060,7 +12060,8 @@ static int arm_tr_init_disas_context(DisasContextBase *dcbase, return max_insns; } -static void arm_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) +static int arm_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu, + int max_insns) { DisasContext *dc = container_of(dcbase, DisasContext, base); @@ -12102,6 +12103,7 @@ static void arm_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) store_cpu_field(tmp, condexec_bits); } tcg_clear_temp_count(); + return max_insns; } static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index b4b74a8..c816ad1 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4726,7 +4726,8 @@ static int hppa_tr_init_disas_context(DisasContextBase *dcbase, return bound; } -static void hppa_tr_tb_start(DisasContextBase *dcbase, CPUState *cs) +static int hppa_tr_tb_start(DisasContextBase *dcbase, CPUState *cs, + int max_insns) { DisasContext *ctx = container_of(dcbase, DisasContext, base); @@ -4738,6 +4739,7 @@ static void hppa_tr_tb_start(DisasContextBase *dcbase, CPUState *cs) ctx->psw_n_nonzero = true; } ctx->null_lab = NULL; + return max_insns; } static void hppa_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) diff --git a/target/i386/translate.c b/target/i386/translate.c index 0135415..7527e8d 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8472,8 +8472,9 @@ static int i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu, return max_insns; } -static void i386_tr_tb_start(DisasContextBase *db, CPUState *cpu) +static int i386_tr_tb_start(DisasContextBase *db, CPUState *cpu, int max_insns) { + return max_insns; } static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
sh4 will need it. Signed-off-by: Emilio G. Cota <cota@braap.org> --- accel/tcg/translator.c | 2 +- include/exec/translator.h | 3 ++- target/alpha/translate.c | 3 ++- target/arm/translate-a64.c | 4 +++- target/arm/translate.c | 4 +++- target/hppa/translate.c | 4 +++- target/i386/translate.c | 3 ++- 7 files changed, 16 insertions(+), 7 deletions(-)