diff mbox

[v3,18/20] dt-bindings: qcom_nandc: IPQ8074 QPIC NAND documentation

Message ID 1501949998-29859-19-git-send-email-absahu@codeaurora.org
State Changes Requested
Delegated to: Boris Brezillon
Headers show

Commit Message

Abhishek Sahu Aug. 5, 2017, 4:19 p.m. UTC
Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0
which uses BAM DMA Engine.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---
 Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Rob Herring (Arm) Aug. 10, 2017, 8:30 p.m. UTC | #1
On Sat, Aug 05, 2017 at 09:49:56PM +0530, Abhishek Sahu wrote:
> Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0
> which uses BAM DMA Engine.
> 
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
> index d93b952..8dfa543 100644
> --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
> +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
> @@ -6,6 +6,8 @@ Required properties:
>  			    SoC and it uses ADM DMA
>      * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
>                              IPQ4019 SoC and it uses BAM DMA
> +    * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
> +                            IPQ8074 SoC and it uses BAM DMA
>  
>  - reg:			MMIO address range
>  - clocks:		must contain core clock and always on clock
> @@ -97,7 +99,7 @@ nand-controller@1ac00000 {
>  };
>  
>  nand-controller@79b0000 {
> -	compatible = "qcom,ipq4019-nand";
> +	compatible = "qcom,ipq4019-nand", "qcom,ipq8074-nand";

The order here should be reversed as 8074 is the newer one. And if 4019 
is the fallback compatible, that needs to be documented above.

Rob
Abhishek Sahu Aug. 11, 2017, 9:02 a.m. UTC | #2
On 2017-08-11 02:00, Rob Herring wrote:
> On Sat, Aug 05, 2017 at 09:49:56PM +0530, Abhishek Sahu wrote:
>> Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0
>> which uses BAM DMA Engine.
>> 
>> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
>> ---
>>  Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt 
>> b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
>> index d93b952..8dfa543 100644
>> --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
>> +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
>> @@ -6,6 +6,8 @@ Required properties:
>>  			    SoC and it uses ADM DMA
>>      * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being 
>> used in
>>                              IPQ4019 SoC and it uses BAM DMA
>> +    * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being 
>> used in
>> +                            IPQ8074 SoC and it uses BAM DMA
>> 
>>  - reg:			MMIO address range
>>  - clocks:		must contain core clock and always on clock
>> @@ -97,7 +99,7 @@ nand-controller@1ac00000 {
>>  };
>> 
>>  nand-controller@79b0000 {
>> -	compatible = "qcom,ipq4019-nand";
>> +	compatible = "qcom,ipq4019-nand", "qcom,ipq8074-nand";
> 
> The order here should be reversed as 8074 is the newer one. And if 4019
> is the fallback compatible, that needs to be documented above.
> 

  Thanks Rob for review.

  This is not fallback compatible. I checked the other device tree
  binding examples and it seems, we don't have to add every
  similar compatible string in example. I will remove the
  qcom,ipq8074-nand from example which is causing confusion.

> Rob
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index d93b952..8dfa543 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -6,6 +6,8 @@  Required properties:
 			    SoC and it uses ADM DMA
     * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
                             IPQ4019 SoC and it uses BAM DMA
+    * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
+                            IPQ8074 SoC and it uses BAM DMA
 
 - reg:			MMIO address range
 - clocks:		must contain core clock and always on clock
@@ -97,7 +99,7 @@  nand-controller@1ac00000 {
 };
 
 nand-controller@79b0000 {
-	compatible = "qcom,ipq4019-nand";
+	compatible = "qcom,ipq4019-nand", "qcom,ipq8074-nand";
 	reg = <0x79b0000 0x1000>;
 
 	clocks = <&gcc GCC_QPIC_CLK>,