| Message ID | 20170727101647.26960-2-andrew@aj.id.au |
|---|---|
| State | Accepted, archived |
| Headers | show |
Tested-by: Matt Spinler mspinler@linux.vnet.ibm.com On 7/27/2017 5:16 AM, Andrew Jeffery wrote: > On Witherspoon, the Aspeed SoC's WDTRST1 pin is wired to the FAULT pin > on the MAX31785 fan controller, which drives the fans to 100% PWM duty > when asserted. The pulse generated by the watchdog is latched to ensure > the fans stay at full speed across the BMC reboot. The latch is reset > when the BMC transitions through the chassis-poweron systemd target. > > The SoC's WDTRST1 pinctrl function needs to be requested for > aspeed,external-signal to be effective, otherwise the pin is not > associated with the watchdog controller. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Cc: Matt Spinler <mspinler@linux.vnet.ibm.com> > --- > arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > index d9649013ee78..c28222c17d03 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > @@ -488,6 +488,9 @@ > &wdt1 { > aspeed,reset-type = "none"; > aspeed,external-signal; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wdtrst1_default>; > }; > > &wdt2 {
On Tue, Aug 1, 2017 at 5:54 AM, Matt Spinler <mspinler@linux.vnet.ibm.com> wrote: > > > On 7/27/2017 5:16 AM, Andrew Jeffery wrote: > > On Witherspoon, the Aspeed SoC's WDTRST1 pin is wired to the FAULT pin > on the MAX31785 fan controller, which drives the fans to 100% PWM duty > when asserted. The pulse generated by the watchdog is latched to ensure > the fans stay at full speed across the BMC reboot. The latch is reset > when the BMC transitions through the chassis-poweron systemd target. > > The SoC's WDTRST1 pinctrl function needs to be requested for > aspeed,external-signal to be effective, otherwise the pin is not > associated with the watchdog controller. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Cc: Matt Spinler <mspinler@linux.vnet.ibm.com> > Tested-by: Matt Spinler mspinler@linux.vnet.ibm.com Applied to dev-4.10. Thanks for the testing Matt! Cheers, Joel
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts index d9649013ee78..c28222c17d03 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts @@ -488,6 +488,9 @@ &wdt1 { aspeed,reset-type = "none"; aspeed,external-signal; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; }; &wdt2 {
On Witherspoon, the Aspeed SoC's WDTRST1 pin is wired to the FAULT pin on the MAX31785 fan controller, which drives the fans to 100% PWM duty when asserted. The pulse generated by the watchdog is latched to ensure the fans stay at full speed across the BMC reboot. The latch is reset when the BMC transitions through the chassis-poweron systemd target. The SoC's WDTRST1 pinctrl function needs to be requested for aspeed,external-signal to be effective, otherwise the pin is not associated with the watchdog controller. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Cc: Matt Spinler <mspinler@linux.vnet.ibm.com> --- arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 3 +++ 1 file changed, 3 insertions(+)