diff mbox

sparc64: simple microoptimizations for atomic functions

Message ID Pine.LNX.4.64.1008190933180.19440@hs20-bc2-1.build.redhat.com
State Accepted
Delegated to: David Miller
Headers show

Commit Message

Mikulas Patocka Aug. 19, 2010, 1:42 p.m. UTC 
>  #define BACKOFF_SETUP(reg)
> -#define BACKOFF_SPIN(reg, tmp, label) \
> -	ba,pt	%xcc, label; \
> -	 nop;

I'm just curious, is there some good reason to place nop in the delay slot 
instead of the anul bit? --- i.e. some inefficiency or bugs?

BTW, I found a missing delay slot.

Mikulas

----

Fill a missing delay slot.

If the code were already aligned to 64 bytes, wr instruction would be executed
twice --- once in delay slot and once in the jump target.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>

---
 arch/sparc/include/asm/system_64.h |    1 +
 1 file changed, 1 insertion(+)

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Comments

David Miller Aug. 19, 2010, 9:14 p.m. UTC | #1 
From: Mikulas Patocka <mpatocka@redhat.com>
Date: Thu, 19 Aug 2010 09:42:55 -0400 (EDT)

>>  #define BACKOFF_SETUP(reg)
>> -#define BACKOFF_SPIN(reg, tmp, label) \
>> -	ba,pt	%xcc, label; \
>> -	 nop;
> 
> I'm just curious, is there some good reason to place nop in the delay slot 
> instead of the anul bit? --- i.e. some inefficiency or bugs?

It's definitely slower on pre-Niagara cpus.

> BTW, I found a missing delay slot.

Good catch, I'll apply this, thanks!
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diff mbox

Patch

Index: linux-2.6.35-preempt/arch/sparc/include/asm/system_64.h
===================================================================
--- linux-2.6.35-preempt.orig/arch/sparc/include/asm/system_64.h	2010-08-19 15:35:45.000000000 +0200
+++ linux-2.6.35-preempt/arch/sparc/include/asm/system_64.h	2010-08-19 15:38:21.000000000 +0200
@@ -106,6 +106,7 @@  do {	__asm__ __volatile__("ba,pt	%%xcc, 
  */
 #define write_pic(__p)  					\
 	__asm__ __volatile__("ba,pt	%%xcc, 99f\n\t"		\
+			     " nop\n\t"				\
 			     ".align	64\n"			\
 			  "99:wr	%0, 0x0, %%pic\n\t"	\
 			     "rd	%%pic, %%g0" : : "r" (__p))