| Message ID | 20100719144358.GA13382@intel.com |
|---|---|
| State | New |
| Headers | show |
On Mon, 2010-07-19 at 07:43 -0700, H.J. Lu wrote: > OSXSAVE is needed for AVX run-time support. This patch adds the OSXSAVE > check for AVX run-time tests. OK to install? No, please introduce check_avx_hw_available and check_avx_os_support_available, similar to very recent commit that "fixed" SSE2 testcases on older solaris OSes. Uros,
On Mon, Jul 19, 2010 at 9:05 AM, Uros Bizjak <ubizjak@gmail.com> wrote: > On Mon, 2010-07-19 at 07:43 -0700, H.J. Lu wrote: > >> OSXSAVE is needed for AVX run-time support. This patch adds the OSXSAVE >> check for AVX run-time tests. OK to install? > > No, please introduce check_avx_hw_available and > check_avx_os_support_available, similar to very recent commit that > "fixed" SSE2 testcases on older solaris OSes. > It is easy to check AVX and OSXSAVE bits at run-time. It isn't easy to implement check_avx_XXXX properly for simulator.
On Mon, 2010-07-19 at 09:12 -0700, H.J. Lu wrote: > On Mon, Jul 19, 2010 at 9:05 AM, Uros Bizjak <ubizjak@gmail.com> wrote: > > On Mon, 2010-07-19 at 07:43 -0700, H.J. Lu wrote: > > > >> OSXSAVE is needed for AVX run-time support. This patch adds the OSXSAVE > >> check for AVX run-time tests. OK to install? > > > > No, please introduce check_avx_hw_available and > > check_avx_os_support_available, similar to very recent commit that > > "fixed" SSE2 testcases on older solaris OSes. > > > > It is easy to check AVX and OSXSAVE bits at run-time. It isn't easy > to implement check_avx_XXXX properly for simulator. Let me explain the idea a bit: By introducing check_avx_hw_available, you are caching the result of cpuid call, so for N testcases that require AVX HW support, you call cpuid only once instead of N-times. Conceptually, OSXSAVE is set by OS, so we can say that checking this bit should be done in check_avx_os_support_available (again, it is cached!). However, CPU will just execute UD in place of AVX insn if OSXSAVE is not set, so I guess that checking both bits in check_effective_target_avx_runtime should also be OK. Uros.
diff --git a/gcc/testsuite/gcc.dg/compat/vector-1b_main.c b/gcc/testsuite/gcc.dg/compat/vector-1b_main.c index fb5a5a9..43a4ccd 100644 --- a/gcc/testsuite/gcc.dg/compat/vector-1b_main.c +++ b/gcc/testsuite/gcc.dg/compat/vector-1b_main.c @@ -20,7 +20,7 @@ main () return 0; /* Run AVX vector test only if host has AVX support. */ - if (ecx & bit_AVX) + if ((ecx & (bit_AVX | bit_OSXSAVE)) == (bit_AVX | bit_OSXSAVE)) vector_1_x (); exit (0); diff --git a/gcc/testsuite/gcc.dg/compat/vector-2b_main.c b/gcc/testsuite/gcc.dg/compat/vector-2b_main.c index c5a9300..ec60208 100644 --- a/gcc/testsuite/gcc.dg/compat/vector-2b_main.c +++ b/gcc/testsuite/gcc.dg/compat/vector-2b_main.c @@ -20,7 +20,7 @@ main () return 0; /* Run AVX vector test only if host has AVX support. */ - if (ecx & bit_AVX) + if ((ecx & (bit_AVX | bit_OSXSAVE)) == (bit_AVX | bit_OSXSAVE)) vector_2_x (); exit (0); diff --git a/gcc/testsuite/gcc.target/i386/aes-avx-check.h b/gcc/testsuite/gcc.target/i386/aes-avx-check.h index e91e881..36a038e 100644 --- a/gcc/testsuite/gcc.target/i386/aes-avx-check.h +++ b/gcc/testsuite/gcc.target/i386/aes-avx-check.h @@ -22,7 +22,8 @@ main () return 0; /* Run AES + AVX test only if host has AES + AVX support. */ - if ((ecx & (bit_AVX | bit_AES)) == (bit_AVX | bit_AES)) + if ((ecx & (bit_AVX | bit_OSXSAVE | bit_AES)) + == (bit_AVX | bit_OSXSAVE | bit_AES)) { do_test (); #ifdef DEBUG diff --git a/gcc/testsuite/gcc.target/i386/avx-check.h b/gcc/testsuite/gcc.target/i386/avx-check.h index 7736fc9..b15584a 100644 --- a/gcc/testsuite/gcc.target/i386/avx-check.h +++ b/gcc/testsuite/gcc.target/i386/avx-check.h @@ -20,7 +20,7 @@ main () return 0; /* Run AVX test only if host has AVX support. */ - if (ecx & bit_AVX) + if ((ecx & (bit_AVX | bit_OSXSAVE)) == (bit_AVX | bit_OSXSAVE)) { do_test (); #ifdef DEBUG diff --git a/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h b/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h index 550e499..750e25c 100644 --- a/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h +++ b/gcc/testsuite/gcc.target/i386/pclmul-avx-check.h @@ -22,7 +22,8 @@ main () return 0; /* Run PCLMUL + AVX test only if host has PCLMUL + AVX support. */ - if ((ecx & (bit_AVX | bit_PCLMUL)) == (bit_AVX | bit_PCLMUL)) + if ((ecx & (bit_AVX | bit_OSXSAVE | bit_PCLMUL)) + == (bit_AVX | bit_OSXSAVE | bit_PCLMUL)) { do_test (); #ifdef DEBUG diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h b/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h index 7f1f8f9..e66a27e 100644 --- a/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h +++ b/gcc/testsuite/gcc.target/x86_64/abi/avx/avx-check.h @@ -12,7 +12,7 @@ main () return 0; /* Run AVX test only if host has AVX support. */ - if (ecx & bit_AVX) + if ((ecx & (bit_AVX | bit_OSXSAVE)) == (bit_AVX | bit_OSXSAVE)) { avx_test (); #ifdef DEBUG